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<title>Static Call Graph - [STM32F103_INTERNET_TO_RS232\STM32F103_INTERNET_TO_RS232.axf]</title></head>
<body><HR>
<H1>Static Call Graph for image STM32F103_INTERNET_TO_RS232\STM32F103_INTERNET_TO_RS232.axf</H1><HR>
<BR><P>#&#060CALLGRAPH&#062# ARM Linker, 6210000: Last Updated: Thu Mar 13 12:22:42 2025
<BR><P>
<H3>Maximum Stack Usage =        824 bytes + Unknown(Cycles, Untraceable Function Pointers)</H3><H3>
Call chain for Maximum Stack Depth:</H3>
main &rArr; HTTP_SET_TEST &rArr; func_analysis_http_request &rArr; send &rArr; send_data_processing &rArr; wiz_write_buf &rArr; IINCHIP_SpiSendData &rArr; HAL_SPI_TransmitReceive &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
<P>
<H3>
Mutually Recursive functions
</H3> <LI><a href="#[1c]">ADC1_2_IRQHandler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[1c]">ADC1_2_IRQHandler</a><BR>
</UL>
<P>
<H3>
Function Pointers
</H3><UL>
 <LI><a href="#[1c]">ADC1_2_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[4]">BusFault_Handler</a> from stm32f1xx_it.o(.text.BusFault_Handler) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[1f]">CAN1_RX1_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[20]">CAN1_SCE_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[15]">DMA1_Channel1_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[16]">DMA1_Channel2_IRQHandler</a> from stm32f1xx_it.o(.text.DMA1_Channel2_IRQHandler) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[17]">DMA1_Channel3_IRQHandler</a> from stm32f1xx_it.o(.text.DMA1_Channel3_IRQHandler) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[18]">DMA1_Channel4_IRQHandler</a> from stm32f1xx_it.o(.text.DMA1_Channel4_IRQHandler) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[19]">DMA1_Channel5_IRQHandler</a> from stm32f1xx_it.o(.text.DMA1_Channel5_IRQHandler) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[1a]">DMA1_Channel6_IRQHandler</a> from stm32f1xx_it.o(.text.DMA1_Channel6_IRQHandler) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[1b]">DMA1_Channel7_IRQHandler</a> from stm32f1xx_it.o(.text.DMA1_Channel7_IRQHandler) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[7]">DebugMon_Handler</a> from stm32f1xx_it.o(.text.DebugMon_Handler) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[10]">EXTI0_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[32]">EXTI15_10_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[11]">EXTI1_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[12]">EXTI2_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[13]">EXTI3_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[14]">EXTI4_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[21]">EXTI9_5_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[e]">FLASH_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[2]">HardFault_Handler</a> from stm32f1xx_it.o(.text.HardFault_Handler) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[2a]">I2C1_ER_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[29]">I2C1_EV_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[2c]">I2C2_ER_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[2b]">I2C2_EV_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[3]">MemManage_Handler</a> from stm32f1xx_it.o(.text.MemManage_Handler) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[1]">NMI_Handler</a> from stm32f1xx_it.o(.text.NMI_Handler) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[b]">PVD_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[8]">PendSV_Handler</a> from stm32f1xx_it.o(.text.PendSV_Handler) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[f]">RCC_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[33]">RTC_Alarm_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[d]">RTC_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[0]">Reset_Handler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[2d]">SPI1_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[2e]">SPI2_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[3a]">SPI_DMAError</a> from stm32f1xx_hal_spi.o(.text.SPI_DMAError) referenced 2 times from stm32f1xx_hal_spi.o(.text.HAL_SPI_Receive_DMA)
 <LI><a href="#[3a]">SPI_DMAError</a> from stm32f1xx_hal_spi.o(.text.SPI_DMAError) referenced 2 times from stm32f1xx_hal_spi.o(.text.HAL_SPI_TransmitReceive_DMA)
 <LI><a href="#[3a]">SPI_DMAError</a> from stm32f1xx_hal_spi.o(.text.SPI_DMAError) referenced 2 times from stm32f1xx_hal_spi.o(.text.HAL_SPI_Transmit_DMA)
 <LI><a href="#[38]">SPI_DMAHalfReceiveCplt</a> from stm32f1xx_hal_spi.o(.text.SPI_DMAHalfReceiveCplt) referenced 2 times from stm32f1xx_hal_spi.o(.text.HAL_SPI_Receive_DMA)
 <LI><a href="#[38]">SPI_DMAHalfReceiveCplt</a> from stm32f1xx_hal_spi.o(.text.SPI_DMAHalfReceiveCplt) referenced 2 times from stm32f1xx_hal_spi.o(.text.HAL_SPI_TransmitReceive_DMA)
 <LI><a href="#[3d]">SPI_DMAHalfTransmitCplt</a> from stm32f1xx_hal_spi.o(.text.SPI_DMAHalfTransmitCplt) referenced 2 times from stm32f1xx_hal_spi.o(.text.HAL_SPI_Transmit_DMA)
 <LI><a href="#[3b]">SPI_DMAHalfTransmitReceiveCplt</a> from stm32f1xx_hal_spi.o(.text.SPI_DMAHalfTransmitReceiveCplt) referenced 2 times from stm32f1xx_hal_spi.o(.text.HAL_SPI_TransmitReceive_DMA)
 <LI><a href="#[39]">SPI_DMAReceiveCplt</a> from stm32f1xx_hal_spi.o(.text.SPI_DMAReceiveCplt) referenced 2 times from stm32f1xx_hal_spi.o(.text.HAL_SPI_Receive_DMA)
 <LI><a href="#[39]">SPI_DMAReceiveCplt</a> from stm32f1xx_hal_spi.o(.text.SPI_DMAReceiveCplt) referenced 2 times from stm32f1xx_hal_spi.o(.text.HAL_SPI_TransmitReceive_DMA)
 <LI><a href="#[3e]">SPI_DMATransmitCplt</a> from stm32f1xx_hal_spi.o(.text.SPI_DMATransmitCplt) referenced 2 times from stm32f1xx_hal_spi.o(.text.HAL_SPI_Transmit_DMA)
 <LI><a href="#[3c]">SPI_DMATransmitReceiveCplt</a> from stm32f1xx_hal_spi.o(.text.SPI_DMATransmitReceiveCplt) referenced 2 times from stm32f1xx_hal_spi.o(.text.HAL_SPI_TransmitReceive_DMA)
 <LI><a href="#[6]">SVC_Handler</a> from stm32f1xx_it.o(.text.SVC_Handler) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[9]">SysTick_Handler</a> from stm32f1xx_it.o(.text.SysTick_Handler) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[36]">SystemInit</a> from system_stm32f1xx.o(.text.SystemInit) referenced from startup_stm32f103xb.o(.text)
 <LI><a href="#[c]">TAMPER_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[22]">TIM1_BRK_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[25]">TIM1_CC_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[24]">TIM1_TRG_COM_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[23]">TIM1_UP_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[26]">TIM2_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[27]">TIM3_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[28]">TIM4_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[3f]">UART_DMAAbortOnError</a> from stm32f1xx_hal_uart.o(.text.UART_DMAAbortOnError) referenced 2 times from stm32f1xx_hal_uart.o(.text.HAL_UART_IRQHandler)
 <LI><a href="#[42]">UART_DMAError</a> from stm32f1xx_hal_uart.o(.text.UART_DMAError) referenced 2 times from stm32f1xx_hal_uart.o(.text.HAL_UART_Transmit_DMA)
 <LI><a href="#[42]">UART_DMAError</a> from stm32f1xx_hal_uart.o(.text.UART_DMAError) referenced 2 times from stm32f1xx_hal_uart.o(.text.UART_Start_Receive_DMA)
 <LI><a href="#[43]">UART_DMAReceiveCplt</a> from stm32f1xx_hal_uart.o(.text.UART_DMAReceiveCplt) referenced 2 times from stm32f1xx_hal_uart.o(.text.UART_Start_Receive_DMA)
 <LI><a href="#[44]">UART_DMARxHalfCplt</a> from stm32f1xx_hal_uart.o(.text.UART_DMARxHalfCplt) referenced 2 times from stm32f1xx_hal_uart.o(.text.UART_Start_Receive_DMA)
 <LI><a href="#[40]">UART_DMATransmitCplt</a> from stm32f1xx_hal_uart.o(.text.UART_DMATransmitCplt) referenced 2 times from stm32f1xx_hal_uart.o(.text.HAL_UART_Transmit_DMA)
 <LI><a href="#[41]">UART_DMATxHalfCplt</a> from stm32f1xx_hal_uart.o(.text.UART_DMATxHalfCplt) referenced 2 times from stm32f1xx_hal_uart.o(.text.HAL_UART_Transmit_DMA)
 <LI><a href="#[2f]">USART1_IRQHandler</a> from stm32f1xx_it.o(.text.USART1_IRQHandler) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[30]">USART2_IRQHandler</a> from stm32f1xx_it.o(.text.USART2_IRQHandler) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[31]">USART3_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[34]">USBWakeUp_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[1d]">USB_HP_CAN1_TX_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[1e]">USB_LP_CAN1_RX0_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[5]">UsageFault_Handler</a> from stm32f1xx_it.o(.text.UsageFault_Handler) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[a]">WWDG_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[37]">__main</a> from entry.o(.ARM.Collect$$$$00000000) referenced from startup_stm32f103xb.o(.text)
 <LI><a href="#[46]">_sputc</a> from printfa.o(i._sputc) referenced from printfa.o(i.__0sprintf)
 <LI><a href="#[45]">fputc</a> from w5500.o(.text.fputc) referenced from printfa.o(i.__0printf)
 <LI><a href="#[35]">main</a> from main.o(.text.main) referenced from entry9a.o(.ARM.Collect$$$$0000000B)
</UL>
<P>
<H3>
Global Symbols
</H3>
<P><STRONG><a name="[37]"></a>__main</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry.o(.ARM.Collect$$$$00000000))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(.text)
</UL>
<P><STRONG><a name="[104]"></a>_main_stk</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry2.o(.ARM.Collect$$$$00000001))

<P><STRONG><a name="[47]"></a>_main_scatterload</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry5.o(.ARM.Collect$$$$00000004))
<BR><BR>[Calls]<UL><LI><a href="#[48]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__scatterload
</UL>

<P><STRONG><a name="[58]"></a>__main_after_scatterload</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry5.o(.ARM.Collect$$$$00000004))
<BR><BR>[Called By]<UL><LI><a href="#[48]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__scatterload
</UL>

<P><STRONG><a name="[105]"></a>_main_clock</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry7b.o(.ARM.Collect$$$$00000008))

<P><STRONG><a name="[106]"></a>_main_cpp_init</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry8b.o(.ARM.Collect$$$$0000000A))

<P><STRONG><a name="[107]"></a>_main_init</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry9a.o(.ARM.Collect$$$$0000000B))

<P><STRONG><a name="[108]"></a>__rt_final_cpp</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry10a.o(.ARM.Collect$$$$0000000D))

<P><STRONG><a name="[109]"></a>__rt_final_exit</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry11a.o(.ARM.Collect$$$$0000000F))

<P><STRONG><a name="[0]"></a>Reset_Handler</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[1c]"></a>ADC1_2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR><BR>[Calls]<UL><LI><a href="#[1c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC1_2_IRQHandler
</UL>
<BR>[Called By]<UL><LI><a href="#[1c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC1_2_IRQHandler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[1f]"></a>CAN1_RX1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[20]"></a>CAN1_SCE_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[15]"></a>DMA1_Channel1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[10]"></a>EXTI0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[32]"></a>EXTI15_10_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[11]"></a>EXTI1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[12]"></a>EXTI2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[13]"></a>EXTI3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[14]"></a>EXTI4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[21]"></a>EXTI9_5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[e]"></a>FLASH_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[2a]"></a>I2C1_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[29]"></a>I2C1_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[2c]"></a>I2C2_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[2b]"></a>I2C2_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[b]"></a>PVD_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[f]"></a>RCC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[33]"></a>RTC_Alarm_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[d]"></a>RTC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[2d]"></a>SPI1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[2e]"></a>SPI2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[c]"></a>TAMPER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[22]"></a>TIM1_BRK_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[25]"></a>TIM1_CC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[24]"></a>TIM1_TRG_COM_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[23]"></a>TIM1_UP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[26]"></a>TIM2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[27]"></a>TIM3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[28]"></a>TIM4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[31]"></a>USART3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[34]"></a>USBWakeUp_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[1d]"></a>USB_HP_CAN1_TX_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[1e]"></a>USB_LP_CAN1_RX0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[a]"></a>WWDG_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[ae]"></a>__aeabi_memcpy</STRONG> (Thumb, 36 bytes, Stack size 0 bytes, memcpya.o(.text))
<BR><BR>[Called By]<UL><LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HTTP_SET_TEST
<LI><a href="#[a8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;func_analysis_http_request
</UL>

<P><STRONG><a name="[10a]"></a>__aeabi_memcpy4</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memcpya.o(.text), UNUSED)

<P><STRONG><a name="[10b]"></a>__aeabi_memcpy8</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memcpya.o(.text), UNUSED)

<P><STRONG><a name="[4a]"></a>__aeabi_memset</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, memseta.o(.text))
<BR><BR>[Called By]<UL><LI><a href="#[4b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_memset$wrapper
<LI><a href="#[49]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr
</UL>

<P><STRONG><a name="[10c]"></a>__aeabi_memset4</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memseta.o(.text), UNUSED)

<P><STRONG><a name="[10d]"></a>__aeabi_memset8</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memseta.o(.text), UNUSED)

<P><STRONG><a name="[49]"></a>__aeabi_memclr</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, memseta.o(.text))
<BR><BR>[Calls]<UL><LI><a href="#[4a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memset
</UL>
<BR>[Called By]<UL><LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HTTP_SET_TEST
<LI><a href="#[aa]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;func_package_http_response
</UL>

<P><STRONG><a name="[ca]"></a>__aeabi_memclr4</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memseta.o(.text))
<BR><BR>[Called By]<UL><LI><a href="#[c9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SystemClock_Config
</UL>

<P><STRONG><a name="[10e]"></a>__aeabi_memclr8</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memseta.o(.text), UNUSED)

<P><STRONG><a name="[4b]"></a>_memset$wrapper</STRONG> (Thumb, 18 bytes, Stack size 8 bytes, memseta.o(.text), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[4a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memset
</UL>

<P><STRONG><a name="[d4]"></a>strstr</STRONG> (Thumb, 36 bytes, Stack size 12 bytes, strstr.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = strstr
</UL>
<BR>[Called By]<UL><LI><a href="#[b1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;change_ip_set
<LI><a href="#[b0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;change_usart_set
<LI><a href="#[ac]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;add_socket_bound_to_http
<LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;add_ip_to_http
<LI><a href="#[a8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;func_analysis_http_request
</UL>

<P><STRONG><a name="[a9]"></a>strcmp</STRONG> (Thumb, 28 bytes, Stack size 8 bytes, strcmp.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = strcmp
</UL>
<BR>[Called By]<UL><LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HTTP_SET_TEST
<LI><a href="#[b1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;change_ip_set
<LI><a href="#[b0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;change_usart_set
<LI><a href="#[ac]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;add_socket_bound_to_http
<LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;add_ip_to_http
<LI><a href="#[a8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;func_analysis_http_request
</UL>

<P><STRONG><a name="[10f]"></a>__aeabi_uidiv</STRONG> (Thumb, 0 bytes, Stack size 12 bytes, uidiv.o(.text), UNUSED)

<P><STRONG><a name="[103]"></a>__aeabi_uidivmod</STRONG> (Thumb, 44 bytes, Stack size 12 bytes, uidiv.o(.text), UNUSED)
<BR><BR>[Called By]<UL><LI><a href="#[fd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_core
</UL>

<P><STRONG><a name="[4c]"></a>__aeabi_uldivmod</STRONG> (Thumb, 98 bytes, Stack size 40 bytes, uldiv.o(.text), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[4d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_llsr
<LI><a href="#[4e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_llsl
</UL>
<BR>[Called By]<UL><LI><a href="#[fd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_core
<LI><a href="#[ff]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fp_digits
</UL>

<P><STRONG><a name="[110]"></a>__I$use$fp</STRONG> (Thumb, 0 bytes, Stack size 48 bytes, iusefp.o(.text), UNUSED)

<P><STRONG><a name="[4f]"></a>__aeabi_dadd</STRONG> (Thumb, 322 bytes, Stack size 48 bytes, dadd.o(.text), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[50]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_lasr
<LI><a href="#[4e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_llsl
<LI><a href="#[52]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_round
<LI><a href="#[51]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_epilogue
</UL>
<BR>[Called By]<UL><LI><a href="#[54]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_drsub
<LI><a href="#[53]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dsub
<LI><a href="#[ff]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fp_digits
</UL>

<P><STRONG><a name="[53]"></a>__aeabi_dsub</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, dadd.o(.text), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[4f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dadd
</UL>

<P><STRONG><a name="[54]"></a>__aeabi_drsub</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, dadd.o(.text), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[4f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dadd
</UL>

<P><STRONG><a name="[55]"></a>__aeabi_dmul</STRONG> (Thumb, 228 bytes, Stack size 48 bytes, dmul.o(.text), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[51]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_epilogue
</UL>
<BR>[Called By]<UL><LI><a href="#[ff]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fp_digits
</UL>

<P><STRONG><a name="[56]"></a>__aeabi_ddiv</STRONG> (Thumb, 222 bytes, Stack size 32 bytes, ddiv.o(.text), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[52]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_round
</UL>
<BR>[Called By]<UL><LI><a href="#[ff]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fp_digits
</UL>

<P><STRONG><a name="[57]"></a>__aeabi_d2ulz</STRONG> (Thumb, 48 bytes, Stack size 0 bytes, dfixul.o(.text), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[4d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_llsr
<LI><a href="#[4e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_llsl
</UL>
<BR>[Called By]<UL><LI><a href="#[ff]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fp_digits
</UL>

<P><STRONG><a name="[100]"></a>__aeabi_cdrcmple</STRONG> (Thumb, 48 bytes, Stack size 0 bytes, cdrcmple.o(.text), UNUSED)
<BR><BR>[Called By]<UL><LI><a href="#[ff]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fp_digits
</UL>

<P><STRONG><a name="[48]"></a>__scatterload</STRONG> (Thumb, 38 bytes, Stack size 0 bytes, init.o(.text))
<BR><BR>[Calls]<UL><LI><a href="#[58]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__main_after_scatterload
</UL>
<BR>[Called By]<UL><LI><a href="#[47]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_main_scatterload
</UL>

<P><STRONG><a name="[111]"></a>__scatterload_rt2</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, init.o(.text), UNUSED)

<P><STRONG><a name="[4e]"></a>__aeabi_llsl</STRONG> (Thumb, 30 bytes, Stack size 0 bytes, llshl.o(.text), UNUSED)
<BR><BR>[Called By]<UL><LI><a href="#[51]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_epilogue
<LI><a href="#[4c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_uldivmod
<LI><a href="#[4f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dadd
<LI><a href="#[57]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_d2ulz
</UL>

<P><STRONG><a name="[112]"></a>_ll_shift_l</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, llshl.o(.text), UNUSED)

<P><STRONG><a name="[4d]"></a>__aeabi_llsr</STRONG> (Thumb, 32 bytes, Stack size 0 bytes, llushr.o(.text), UNUSED)
<BR><BR>[Called By]<UL><LI><a href="#[51]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_epilogue
<LI><a href="#[4c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_uldivmod
<LI><a href="#[57]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_d2ulz
</UL>

<P><STRONG><a name="[113]"></a>_ll_ushift_r</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, llushr.o(.text), UNUSED)

<P><STRONG><a name="[50]"></a>__aeabi_lasr</STRONG> (Thumb, 36 bytes, Stack size 0 bytes, llsshr.o(.text), UNUSED)
<BR><BR>[Called By]<UL><LI><a href="#[4f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dadd
</UL>

<P><STRONG><a name="[114]"></a>_ll_sshift_r</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, llsshr.o(.text), UNUSED)

<P><STRONG><a name="[52]"></a>_double_round</STRONG> (Thumb, 30 bytes, Stack size 8 bytes, depilogue.o(.text), UNUSED)
<BR><BR>[Called By]<UL><LI><a href="#[51]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_epilogue
<LI><a href="#[56]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_ddiv
<LI><a href="#[4f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dadd
</UL>

<P><STRONG><a name="[51]"></a>_double_epilogue</STRONG> (Thumb, 156 bytes, Stack size 32 bytes, depilogue.o(.text), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[4d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_llsr
<LI><a href="#[4e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_llsl
<LI><a href="#[52]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_round
</UL>
<BR>[Called By]<UL><LI><a href="#[55]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dmul
<LI><a href="#[4f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dadd
</UL>

<P><STRONG><a name="[59]"></a>AT24C02_INIT</STRONG> (Thumb, 48 bytes, Stack size 8 bytes, at24c02.o(.text.AT24C02_INIT))
<BR><BR>[Stack]<UL><LI>Max Depth = 264<LI>Call Chain = AT24C02_INIT &rArr; AT24C02_load_data &rArr; AT24C02_READ &rArr; HAL_I2C_Mem_Read &rArr; I2C_RequestMemoryRead &rArr; I2C_WaitOnMasterAddressFlagUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[5a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_WritePin
<LI><a href="#[5b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_ReadPin
<LI><a href="#[5d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;AT24C02_load_data
<LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;AT24C02_save_data
</UL>
<BR>[Called By]<UL><LI><a href="#[35]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[5e]"></a>AT24C02_READ</STRONG> (Thumb, 186 bytes, Stack size 56 bytes, at24c02.o(.text.AT24C02_READ))
<BR><BR>[Stack]<UL><LI>Max Depth = 200<LI>Call Chain = AT24C02_READ &rArr; HAL_I2C_Mem_Read &rArr; I2C_RequestMemoryRead &rArr; I2C_WaitOnMasterAddressFlagUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[5f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_I2C_Mem_Read
</UL>
<BR>[Called By]<UL><LI><a href="#[5d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;AT24C02_load_data
</UL>

<P><STRONG><a name="[60]"></a>AT24C02_WRITE</STRONG> (Thumb, 188 bytes, Stack size 48 bytes, at24c02.o(.text.AT24C02_WRITE))
<BR><BR>[Stack]<UL><LI>Max Depth = 160<LI>Call Chain = AT24C02_WRITE &rArr; HAL_I2C_Mem_Write &rArr; I2C_RequestMemoryWrite &rArr; I2C_WaitOnMasterAddressFlagUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[61]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_I2C_Mem_Write
<LI><a href="#[62]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_Delay
</UL>
<BR>[Called By]<UL><LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;AT24C02_save_data
</UL>

<P><STRONG><a name="[5d]"></a>AT24C02_load_data</STRONG> (Thumb, 580 bytes, Stack size 56 bytes, at24c02.o(.text.AT24C02_load_data))
<BR><BR>[Stack]<UL><LI>Max Depth = 256<LI>Call Chain = AT24C02_load_data &rArr; AT24C02_READ &rArr; HAL_I2C_Mem_Read &rArr; I2C_RequestMemoryRead &rArr; I2C_WaitOnMasterAddressFlagUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[5e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;AT24C02_READ
<LI><a href="#[63]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CRC_calculate_crc16
</UL>
<BR>[Called By]<UL><LI><a href="#[59]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;AT24C02_INIT
</UL>

<P><STRONG><a name="[5c]"></a>AT24C02_save_data</STRONG> (Thumb, 76 bytes, Stack size 40 bytes, at24c02.o(.text.AT24C02_save_data))
<BR><BR>[Stack]<UL><LI>Max Depth = 200<LI>Call Chain = AT24C02_save_data &rArr; AT24C02_WRITE &rArr; HAL_I2C_Mem_Write &rArr; I2C_RequestMemoryWrite &rArr; I2C_WaitOnMasterAddressFlagUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[60]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;AT24C02_WRITE
<LI><a href="#[63]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CRC_calculate_crc16
</UL>
<BR>[Called By]<UL><LI><a href="#[59]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;AT24C02_INIT
<LI><a href="#[b1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;change_ip_set
<LI><a href="#[b0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;change_usart_set
</UL>

<P><STRONG><a name="[4]"></a>BusFault_Handler</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, stm32f1xx_it.o(.text.BusFault_Handler))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[63]"></a>CRC_calculate_crc16</STRONG> (Thumb, 342 bytes, Stack size 36 bytes, tcp_demo.o(.text.CRC_calculate_crc16))
<BR><BR>[Stack]<UL><LI>Max Depth = 36<LI>Call Chain = CRC_calculate_crc16
</UL>
<BR>[Called By]<UL><LI><a href="#[5d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;AT24C02_load_data
<LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;AT24C02_save_data
</UL>

<P><STRONG><a name="[16]"></a>DMA1_Channel2_IRQHandler</STRONG> (Thumb, 16 bytes, Stack size 8 bytes, stm32f1xx_it.o(.text.DMA1_Channel2_IRQHandler))
<BR><BR>[Stack]<UL><LI>Max Depth = 72<LI>Call Chain = DMA1_Channel2_IRQHandler &rArr; HAL_DMA_IRQHandler
</UL>
<BR>[Calls]<UL><LI><a href="#[64]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMA_IRQHandler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[17]"></a>DMA1_Channel3_IRQHandler</STRONG> (Thumb, 16 bytes, Stack size 8 bytes, stm32f1xx_it.o(.text.DMA1_Channel3_IRQHandler))
<BR><BR>[Stack]<UL><LI>Max Depth = 72<LI>Call Chain = DMA1_Channel3_IRQHandler &rArr; HAL_DMA_IRQHandler
</UL>
<BR>[Calls]<UL><LI><a href="#[64]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMA_IRQHandler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[18]"></a>DMA1_Channel4_IRQHandler</STRONG> (Thumb, 16 bytes, Stack size 8 bytes, stm32f1xx_it.o(.text.DMA1_Channel4_IRQHandler))
<BR><BR>[Stack]<UL><LI>Max Depth = 72<LI>Call Chain = DMA1_Channel4_IRQHandler &rArr; HAL_DMA_IRQHandler
</UL>
<BR>[Calls]<UL><LI><a href="#[64]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMA_IRQHandler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[19]"></a>DMA1_Channel5_IRQHandler</STRONG> (Thumb, 28 bytes, Stack size 16 bytes, stm32f1xx_it.o(.text.DMA1_Channel5_IRQHandler))
<BR><BR>[Stack]<UL><LI>Max Depth = 80<LI>Call Chain = DMA1_Channel5_IRQHandler &rArr; HAL_DMA_IRQHandler
</UL>
<BR>[Calls]<UL><LI><a href="#[65]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART1_XferHalfCpltCallback2
<LI><a href="#[64]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMA_IRQHandler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[1a]"></a>DMA1_Channel6_IRQHandler</STRONG> (Thumb, 28 bytes, Stack size 16 bytes, stm32f1xx_it.o(.text.DMA1_Channel6_IRQHandler))
<BR><BR>[Stack]<UL><LI>Max Depth = 80<LI>Call Chain = DMA1_Channel6_IRQHandler &rArr; HAL_DMA_IRQHandler
</UL>
<BR>[Calls]<UL><LI><a href="#[65]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART1_XferHalfCpltCallback2
<LI><a href="#[64]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMA_IRQHandler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[1b]"></a>DMA1_Channel7_IRQHandler</STRONG> (Thumb, 16 bytes, Stack size 8 bytes, stm32f1xx_it.o(.text.DMA1_Channel7_IRQHandler))
<BR><BR>[Stack]<UL><LI>Max Depth = 72<LI>Call Chain = DMA1_Channel7_IRQHandler &rArr; HAL_DMA_IRQHandler
</UL>
<BR>[Calls]<UL><LI><a href="#[64]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMA_IRQHandler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[7]"></a>DebugMon_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f1xx_it.o(.text.DebugMon_Handler))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[88]"></a>Error_Handler</STRONG> (Thumb, 14 bytes, Stack size 4 bytes, main.o(.text.Error_Handler))
<BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = Error_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[99]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_MspInit
<LI><a href="#[86]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_MspInit
<LI><a href="#[be]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART2_UART_Init
<LI><a href="#[bd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART1_UART_Init
<LI><a href="#[bc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_SPI1_Init
<LI><a href="#[bb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_I2C1_Init
<LI><a href="#[c9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SystemClock_Config
</UL>

<P><STRONG><a name="[94]"></a>HAL_DMA_Abort</STRONG> (Thumb, 124 bytes, Stack size 12 bytes, stm32f1xx_hal_dma.o(.text.HAL_DMA_Abort))
<BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = HAL_DMA_Abort
</UL>
<BR>[Called By]<UL><LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_IRQHandler
</UL>

<P><STRONG><a name="[92]"></a>HAL_DMA_Abort_IT</STRONG> (Thumb, 284 bytes, Stack size 40 bytes, stm32f1xx_hal_dma.o(.text.HAL_DMA_Abort_IT))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = HAL_DMA_Abort_IT
</UL>
<BR>[Called By]<UL><LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_IRQHandler
</UL>

<P><STRONG><a name="[64]"></a>HAL_DMA_IRQHandler</STRONG> (Thumb, 646 bytes, Stack size 64 bytes, stm32f1xx_hal_dma.o(.text.HAL_DMA_IRQHandler))
<BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = HAL_DMA_IRQHandler
</UL>
<BR>[Called By]<UL><LI><a href="#[1b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA1_Channel7_IRQHandler
<LI><a href="#[1a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA1_Channel6_IRQHandler
<LI><a href="#[19]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA1_Channel5_IRQHandler
<LI><a href="#[18]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA1_Channel4_IRQHandler
<LI><a href="#[17]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA1_Channel3_IRQHandler
<LI><a href="#[16]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA1_Channel2_IRQHandler
</UL>

<P><STRONG><a name="[87]"></a>HAL_DMA_Init</STRONG> (Thumb, 174 bytes, Stack size 12 bytes, stm32f1xx_hal_dma.o(.text.HAL_DMA_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = HAL_DMA_Init
</UL>
<BR>[Called By]<UL><LI><a href="#[99]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_MspInit
<LI><a href="#[86]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_MspInit
</UL>

<P><STRONG><a name="[66]"></a>HAL_DMA_Start_IT</STRONG> (Thumb, 202 bytes, Stack size 32 bytes, stm32f1xx_hal_dma.o(.text.HAL_DMA_Start_IT))
<BR><BR>[Stack]<UL><LI>Max Depth = 48<LI>Call Chain = HAL_DMA_Start_IT &rArr; DMA_SetConfig
</UL>
<BR>[Calls]<UL><LI><a href="#[67]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_SetConfig
</UL>
<BR>[Called By]<UL><LI><a href="#[9c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_Start_Receive_DMA
<LI><a href="#[9d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_Transmit_DMA
<LI><a href="#[8a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_TransmitReceive_DMA
<LI><a href="#[89]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_Receive_DMA
<LI><a href="#[8d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_Transmit_DMA
</UL>

<P><STRONG><a name="[62]"></a>HAL_Delay</STRONG> (Thumb, 66 bytes, Stack size 24 bytes, stm32f1xx_hal.o(.text.HAL_Delay))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = HAL_Delay
</UL>
<BR>[Calls]<UL><LI><a href="#[68]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
</UL>
<BR>[Called By]<UL><LI><a href="#[35]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
<LI><a href="#[60]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;AT24C02_WRITE
<LI><a href="#[a8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;func_analysis_http_request
<LI><a href="#[d9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;delay_ms
</UL>

<P><STRONG><a name="[72]"></a>HAL_GPIO_Init</STRONG> (Thumb, 798 bytes, Stack size 64 bytes, stm32f1xx_hal_gpio.o(.text.HAL_GPIO_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = HAL_GPIO_Init
</UL>
<BR>[Called By]<UL><LI><a href="#[99]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_MspInit
<LI><a href="#[86]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_MspInit
<LI><a href="#[6a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_I2C_MspInit
<LI><a href="#[ba]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_GPIO_Init
</UL>

<P><STRONG><a name="[5b]"></a>HAL_GPIO_ReadPin</STRONG> (Thumb, 46 bytes, Stack size 8 bytes, stm32f1xx_hal_gpio.o(.text.HAL_GPIO_ReadPin))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = HAL_GPIO_ReadPin
</UL>
<BR>[Called By]<UL><LI><a href="#[59]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;AT24C02_INIT
<LI><a href="#[35]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[5a]"></a>HAL_GPIO_WritePin</STRONG> (Thumb, 46 bytes, Stack size 8 bytes, stm32f1xx_hal_gpio.o(.text.HAL_GPIO_WritePin))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = HAL_GPIO_WritePin
</UL>
<BR>[Called By]<UL><LI><a href="#[ea]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;reset_w5500
<LI><a href="#[59]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;AT24C02_INIT
<LI><a href="#[ba]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_GPIO_Init
<LI><a href="#[35]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
<LI><a href="#[a8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;func_analysis_http_request
<LI><a href="#[e7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wiz_cs
</UL>

<P><STRONG><a name="[68]"></a>HAL_GetTick</STRONG> (Thumb, 12 bytes, Stack size 0 bytes, stm32f1xx_hal.o(.text.HAL_GetTick))
<BR><BR>[Called By]<UL><LI><a href="#[8b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_TransmitReceive
<LI><a href="#[3c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_DMATransmitReceiveCplt
<LI><a href="#[39]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_DMAReceiveCplt
<LI><a href="#[3e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_DMATransmitCplt
<LI><a href="#[c7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_WaitFlagStateUntilTimeout
<LI><a href="#[5f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_I2C_Mem_Read
<LI><a href="#[61]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_I2C_Mem_Write
<LI><a href="#[6e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;I2C_WaitOnRXNEFlagUntilTimeout
<LI><a href="#[b2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;I2C_WaitOnMasterAddressFlagUntilTimeout
<LI><a href="#[71]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;I2C_WaitOnBTFFlagUntilTimeout
<LI><a href="#[70]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;I2C_WaitOnTXEFlagUntilTimeout
<LI><a href="#[6c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;I2C_WaitOnFlagUntilTimeout
<LI><a href="#[7f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_ClockConfig
<LI><a href="#[83]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_OscConfig
<LI><a href="#[62]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_Delay
</UL>

<P><STRONG><a name="[69]"></a>HAL_I2C_Init</STRONG> (Thumb, 676 bytes, Stack size 64 bytes, stm32f1xx_hal_i2c.o(.text.HAL_I2C_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 168<LI>Call Chain = HAL_I2C_Init &rArr; HAL_I2C_MspInit &rArr; HAL_GPIO_Init
</UL>
<BR>[Calls]<UL><LI><a href="#[6b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_GetPCLK1Freq
<LI><a href="#[6a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_I2C_MspInit
</UL>
<BR>[Called By]<UL><LI><a href="#[bb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_I2C1_Init
</UL>

<P><STRONG><a name="[5f]"></a>HAL_I2C_Mem_Read</STRONG> (Thumb, 1222 bytes, Stack size 72 bytes, stm32f1xx_hal_i2c.o(.text.HAL_I2C_Mem_Read))
<BR><BR>[Stack]<UL><LI>Max Depth = 144<LI>Call Chain = HAL_I2C_Mem_Read &rArr; I2C_RequestMemoryRead &rArr; I2C_WaitOnMasterAddressFlagUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[68]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
<LI><a href="#[6d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;I2C_RequestMemoryRead
<LI><a href="#[6e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;I2C_WaitOnRXNEFlagUntilTimeout
<LI><a href="#[6c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;I2C_WaitOnFlagUntilTimeout
</UL>
<BR>[Called By]<UL><LI><a href="#[5e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;AT24C02_READ
</UL>

<P><STRONG><a name="[61]"></a>HAL_I2C_Mem_Write</STRONG> (Thumb, 528 bytes, Stack size 40 bytes, stm32f1xx_hal_i2c.o(.text.HAL_I2C_Mem_Write))
<BR><BR>[Stack]<UL><LI>Max Depth = 112<LI>Call Chain = HAL_I2C_Mem_Write &rArr; I2C_RequestMemoryWrite &rArr; I2C_WaitOnMasterAddressFlagUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[68]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
<LI><a href="#[6f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;I2C_RequestMemoryWrite
<LI><a href="#[71]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;I2C_WaitOnBTFFlagUntilTimeout
<LI><a href="#[70]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;I2C_WaitOnTXEFlagUntilTimeout
<LI><a href="#[6c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;I2C_WaitOnFlagUntilTimeout
</UL>
<BR>[Called By]<UL><LI><a href="#[60]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;AT24C02_WRITE
</UL>

<P><STRONG><a name="[6a]"></a>HAL_I2C_MspInit</STRONG> (Thumb, 162 bytes, Stack size 40 bytes, i2c.o(.text.HAL_I2C_MspInit))
<BR><BR>[Stack]<UL><LI>Max Depth = 104<LI>Call Chain = HAL_I2C_MspInit &rArr; HAL_GPIO_Init
</UL>
<BR>[Calls]<UL><LI><a href="#[72]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_Init
</UL>
<BR>[Called By]<UL><LI><a href="#[69]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_I2C_Init
</UL>

<P><STRONG><a name="[c8]"></a>HAL_IncTick</STRONG> (Thumb, 26 bytes, Stack size 0 bytes, stm32f1xx_hal.o(.text.HAL_IncTick))
<BR><BR>[Called By]<UL><LI><a href="#[9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SysTick_Handler
</UL>

<P><STRONG><a name="[73]"></a>HAL_Init</STRONG> (Thumb, 38 bytes, Stack size 8 bytes, stm32f1xx_hal.o(.text.HAL_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 88<LI>Call Chain = HAL_Init &rArr; HAL_InitTick &rArr; HAL_NVIC_SetPriority &rArr; NVIC_EncodePriority
</UL>
<BR>[Calls]<UL><LI><a href="#[75]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_InitTick
<LI><a href="#[74]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_SetPriorityGrouping
<LI><a href="#[76]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_MspInit
</UL>
<BR>[Called By]<UL><LI><a href="#[35]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[75]"></a>HAL_InitTick</STRONG> (Thumb, 112 bytes, Stack size 16 bytes, stm32f1xx_hal.o(.text.HAL_InitTick))
<BR><BR>[Stack]<UL><LI>Max Depth = 80<LI>Call Chain = HAL_InitTick &rArr; HAL_NVIC_SetPriority &rArr; NVIC_EncodePriority
</UL>
<BR>[Calls]<UL><LI><a href="#[77]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SYSTICK_Config
<LI><a href="#[78]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_SetPriority
</UL>
<BR>[Called By]<UL><LI><a href="#[7f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_ClockConfig
<LI><a href="#[73]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_Init
</UL>

<P><STRONG><a name="[76]"></a>HAL_MspInit</STRONG> (Thumb, 100 bytes, Stack size 12 bytes, stm32f1xx_hal_msp.o(.text.HAL_MspInit))
<BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = HAL_MspInit
</UL>
<BR>[Called By]<UL><LI><a href="#[73]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_Init
</UL>

<P><STRONG><a name="[79]"></a>HAL_NVIC_EnableIRQ</STRONG> (Thumb, 20 bytes, Stack size 16 bytes, stm32f1xx_hal_cortex.o(.text.HAL_NVIC_EnableIRQ))
<BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = HAL_NVIC_EnableIRQ &rArr; __NVIC_EnableIRQ
</UL>
<BR>[Calls]<UL><LI><a href="#[7a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__NVIC_EnableIRQ
</UL>
<BR>[Called By]<UL><LI><a href="#[99]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_MspInit
<LI><a href="#[b9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_DMA_Init
</UL>

<P><STRONG><a name="[78]"></a>HAL_NVIC_SetPriority</STRONG> (Thumb, 50 bytes, Stack size 32 bytes, stm32f1xx_hal_cortex.o(.text.HAL_NVIC_SetPriority))
<BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = HAL_NVIC_SetPriority &rArr; NVIC_EncodePriority
</UL>
<BR>[Calls]<UL><LI><a href="#[7d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__NVIC_SetPriority
<LI><a href="#[7c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NVIC_EncodePriority
<LI><a href="#[7b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__NVIC_GetPriorityGrouping
</UL>
<BR>[Called By]<UL><LI><a href="#[75]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_InitTick
<LI><a href="#[99]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_MspInit
<LI><a href="#[b9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_DMA_Init
</UL>

<P><STRONG><a name="[74]"></a>HAL_NVIC_SetPriorityGrouping</STRONG> (Thumb, 16 bytes, Stack size 16 bytes, stm32f1xx_hal_cortex.o(.text.HAL_NVIC_SetPriorityGrouping))
<BR><BR>[Stack]<UL><LI>Max Depth = 28<LI>Call Chain = HAL_NVIC_SetPriorityGrouping &rArr; __NVIC_SetPriorityGrouping
</UL>
<BR>[Calls]<UL><LI><a href="#[7e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__NVIC_SetPriorityGrouping
</UL>
<BR>[Called By]<UL><LI><a href="#[73]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_Init
</UL>

<P><STRONG><a name="[7f]"></a>HAL_RCC_ClockConfig</STRONG> (Thumb, 598 bytes, Stack size 24 bytes, stm32f1xx_hal_rcc.o(.text.HAL_RCC_ClockConfig))
<BR><BR>[Stack]<UL><LI>Max Depth = 104<LI>Call Chain = HAL_RCC_ClockConfig &rArr; HAL_InitTick &rArr; HAL_NVIC_SetPriority &rArr; NVIC_EncodePriority
</UL>
<BR>[Calls]<UL><LI><a href="#[80]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_GetSysClockFreq
<LI><a href="#[75]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_InitTick
<LI><a href="#[68]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
</UL>
<BR>[Called By]<UL><LI><a href="#[c9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SystemClock_Config
</UL>

<P><STRONG><a name="[81]"></a>HAL_RCC_GetHCLKFreq</STRONG> (Thumb, 12 bytes, Stack size 0 bytes, stm32f1xx_hal_rcc.o(.text.HAL_RCC_GetHCLKFreq))
<BR><BR>[Called By]<UL><LI><a href="#[82]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_GetPCLK2Freq
<LI><a href="#[6b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_GetPCLK1Freq
<LI><a href="#[da]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;delay_us
</UL>

<P><STRONG><a name="[6b]"></a>HAL_RCC_GetPCLK1Freq</STRONG> (Thumb, 34 bytes, Stack size 8 bytes, stm32f1xx_hal_rcc.o(.text.HAL_RCC_GetPCLK1Freq))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = HAL_RCC_GetPCLK1Freq
</UL>
<BR>[Calls]<UL><LI><a href="#[81]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_GetHCLKFreq
</UL>
<BR>[Called By]<UL><LI><a href="#[9a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_SetConfig
<LI><a href="#[69]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_I2C_Init
</UL>

<P><STRONG><a name="[82]"></a>HAL_RCC_GetPCLK2Freq</STRONG> (Thumb, 34 bytes, Stack size 8 bytes, stm32f1xx_hal_rcc.o(.text.HAL_RCC_GetPCLK2Freq))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = HAL_RCC_GetPCLK2Freq
</UL>
<BR>[Calls]<UL><LI><a href="#[81]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_GetHCLKFreq
</UL>
<BR>[Called By]<UL><LI><a href="#[9a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_SetConfig
</UL>

<P><STRONG><a name="[80]"></a>HAL_RCC_GetSysClockFreq</STRONG> (Thumb, 188 bytes, Stack size 24 bytes, stm32f1xx_hal_rcc.o(.text.HAL_RCC_GetSysClockFreq))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = HAL_RCC_GetSysClockFreq
</UL>
<BR>[Called By]<UL><LI><a href="#[7f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_ClockConfig
</UL>

<P><STRONG><a name="[83]"></a>HAL_RCC_OscConfig</STRONG> (Thumb, 1658 bytes, Stack size 32 bytes, stm32f1xx_hal_rcc.o(.text.HAL_RCC_OscConfig))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = HAL_RCC_OscConfig &rArr; RCC_Delay
</UL>
<BR>[Calls]<UL><LI><a href="#[84]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_Delay
<LI><a href="#[68]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
</UL>
<BR>[Called By]<UL><LI><a href="#[c9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SystemClock_Config
</UL>

<P><STRONG><a name="[bf]"></a>HAL_SPI_ErrorCallback</STRONG> (Thumb, 8 bytes, Stack size 4 bytes, stm32f1xx_hal_spi.o(.text.HAL_SPI_ErrorCallback))
<BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = HAL_SPI_ErrorCallback
</UL>
<BR>[Called By]<UL><LI><a href="#[3c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_DMATransmitReceiveCplt
<LI><a href="#[39]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_DMAReceiveCplt
<LI><a href="#[3a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_DMAError
<LI><a href="#[3e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_DMATransmitCplt
</UL>

<P><STRONG><a name="[fb]"></a>HAL_SPI_GetState</STRONG> (Thumb, 14 bytes, Stack size 4 bytes, stm32f1xx_hal_spi.o(.text.HAL_SPI_GetState))
<BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = HAL_SPI_GetState
</UL>
<BR>[Called By]<UL><LI><a href="#[f4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wiz_write_buf
<LI><a href="#[e3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wiz_read_buf
</UL>

<P><STRONG><a name="[85]"></a>HAL_SPI_Init</STRONG> (Thumb, 248 bytes, Stack size 24 bytes, stm32f1xx_hal_spi.o(.text.HAL_SPI_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 144<LI>Call Chain = HAL_SPI_Init &rArr; HAL_SPI_MspInit &rArr; HAL_GPIO_Init
</UL>
<BR>[Calls]<UL><LI><a href="#[86]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_MspInit
</UL>
<BR>[Called By]<UL><LI><a href="#[bc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_SPI1_Init
</UL>

<P><STRONG><a name="[86]"></a>HAL_SPI_MspInit</STRONG> (Thumb, 294 bytes, Stack size 56 bytes, spi.o(.text.HAL_SPI_MspInit))
<BR><BR>[Stack]<UL><LI>Max Depth = 120<LI>Call Chain = HAL_SPI_MspInit &rArr; HAL_GPIO_Init
</UL>
<BR>[Calls]<UL><LI><a href="#[87]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMA_Init
<LI><a href="#[72]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_Init
<LI><a href="#[88]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Error_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[85]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_Init
</UL>

<P><STRONG><a name="[89]"></a>HAL_SPI_Receive_DMA</STRONG> (Thumb, 406 bytes, Stack size 24 bytes, stm32f1xx_hal_spi.o(.text.HAL_SPI_Receive_DMA))
<BR><BR>[Stack]<UL><LI>Max Depth = 112<LI>Call Chain = HAL_SPI_Receive_DMA &rArr; HAL_SPI_TransmitReceive_DMA &rArr; HAL_DMA_Start_IT &rArr; DMA_SetConfig
</UL>
<BR>[Calls]<UL><LI><a href="#[8a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_TransmitReceive_DMA
<LI><a href="#[66]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMA_Start_IT
</UL>
<BR>[Called By]<UL><LI><a href="#[e3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wiz_read_buf
</UL>

<P><STRONG><a name="[c4]"></a>HAL_SPI_RxCpltCallback</STRONG> (Thumb, 8 bytes, Stack size 4 bytes, stm32f1xx_hal_spi.o(.text.HAL_SPI_RxCpltCallback))
<BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = HAL_SPI_RxCpltCallback
</UL>
<BR>[Called By]<UL><LI><a href="#[39]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_DMAReceiveCplt
</UL>

<P><STRONG><a name="[c0]"></a>HAL_SPI_RxHalfCpltCallback</STRONG> (Thumb, 8 bytes, Stack size 4 bytes, stm32f1xx_hal_spi.o(.text.HAL_SPI_RxHalfCpltCallback))
<BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = HAL_SPI_RxHalfCpltCallback
</UL>
<BR>[Called By]<UL><LI><a href="#[38]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_DMAHalfReceiveCplt
</UL>

<P><STRONG><a name="[8b]"></a>HAL_SPI_TransmitReceive</STRONG> (Thumb, 904 bytes, Stack size 64 bytes, stm32f1xx_hal_spi.o(.text.HAL_SPI_TransmitReceive))
<BR><BR>[Stack]<UL><LI>Max Depth = 144<LI>Call Chain = HAL_SPI_TransmitReceive &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[8c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_EndRxTxTransaction
<LI><a href="#[68]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
</UL>
<BR>[Called By]<UL><LI><a href="#[b6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IINCHIP_SpiSendData
</UL>

<P><STRONG><a name="[8a]"></a>HAL_SPI_TransmitReceive_DMA</STRONG> (Thumb, 518 bytes, Stack size 40 bytes, stm32f1xx_hal_spi.o(.text.HAL_SPI_TransmitReceive_DMA))
<BR><BR>[Stack]<UL><LI>Max Depth = 88<LI>Call Chain = HAL_SPI_TransmitReceive_DMA &rArr; HAL_DMA_Start_IT &rArr; DMA_SetConfig
</UL>
<BR>[Calls]<UL><LI><a href="#[66]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMA_Start_IT
</UL>
<BR>[Called By]<UL><LI><a href="#[89]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_Receive_DMA
</UL>

<P><STRONG><a name="[8d]"></a>HAL_SPI_Transmit_DMA</STRONG> (Thumb, 362 bytes, Stack size 24 bytes, stm32f1xx_hal_spi.o(.text.HAL_SPI_Transmit_DMA))
<BR><BR>[Stack]<UL><LI>Max Depth = 72<LI>Call Chain = HAL_SPI_Transmit_DMA &rArr; HAL_DMA_Start_IT &rArr; DMA_SetConfig
</UL>
<BR>[Calls]<UL><LI><a href="#[66]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMA_Start_IT
</UL>
<BR>[Called By]<UL><LI><a href="#[f4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wiz_write_buf
</UL>

<P><STRONG><a name="[c5]"></a>HAL_SPI_TxCpltCallback</STRONG> (Thumb, 8 bytes, Stack size 4 bytes, stm32f1xx_hal_spi.o(.text.HAL_SPI_TxCpltCallback))
<BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = HAL_SPI_TxCpltCallback
</UL>
<BR>[Called By]<UL><LI><a href="#[3e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_DMATransmitCplt
</UL>

<P><STRONG><a name="[c1]"></a>HAL_SPI_TxHalfCpltCallback</STRONG> (Thumb, 8 bytes, Stack size 4 bytes, stm32f1xx_hal_spi.o(.text.HAL_SPI_TxHalfCpltCallback))
<BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = HAL_SPI_TxHalfCpltCallback
</UL>
<BR>[Called By]<UL><LI><a href="#[3d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_DMAHalfTransmitCplt
</UL>

<P><STRONG><a name="[c6]"></a>HAL_SPI_TxRxCpltCallback</STRONG> (Thumb, 8 bytes, Stack size 4 bytes, stm32f1xx_hal_spi.o(.text.HAL_SPI_TxRxCpltCallback))
<BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = HAL_SPI_TxRxCpltCallback
</UL>
<BR>[Called By]<UL><LI><a href="#[3c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_DMATransmitReceiveCplt
</UL>

<P><STRONG><a name="[c2]"></a>HAL_SPI_TxRxHalfCpltCallback</STRONG> (Thumb, 8 bytes, Stack size 4 bytes, stm32f1xx_hal_spi.o(.text.HAL_SPI_TxRxHalfCpltCallback))
<BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = HAL_SPI_TxRxHalfCpltCallback
</UL>
<BR>[Called By]<UL><LI><a href="#[3b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_DMAHalfTransmitReceiveCplt
</UL>

<P><STRONG><a name="[77]"></a>HAL_SYSTICK_Config</STRONG> (Thumb, 16 bytes, Stack size 16 bytes, stm32f1xx_hal_cortex.o(.text.HAL_SYSTICK_Config))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = HAL_SYSTICK_Config &rArr; SysTick_Config &rArr; __NVIC_SetPriority
</UL>
<BR>[Calls]<UL><LI><a href="#[8e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SysTick_Config
</UL>
<BR>[Called By]<UL><LI><a href="#[75]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_InitTick
</UL>

<P><STRONG><a name="[95]"></a>HAL_UARTEx_RxEventCallback</STRONG> (Thumb, 12 bytes, Stack size 8 bytes, stm32f1xx_hal_uart.o(.text.HAL_UARTEx_RxEventCallback))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = HAL_UARTEx_RxEventCallback
</UL>
<BR>[Called By]<UL><LI><a href="#[90]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_Receive_IT
<LI><a href="#[44]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_DMARxHalfCplt
<LI><a href="#[43]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_DMAReceiveCplt
<LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_IRQHandler
</UL>

<P><STRONG><a name="[93]"></a>HAL_UART_ErrorCallback</STRONG> (Thumb, 8 bytes, Stack size 4 bytes, stm32f1xx_hal_uart.o(.text.HAL_UART_ErrorCallback))
<BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = HAL_UART_ErrorCallback
</UL>
<BR>[Called By]<UL><LI><a href="#[3f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_DMAAbortOnError
<LI><a href="#[42]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_DMAError
<LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_IRQHandler
</UL>

<P><STRONG><a name="[de]"></a>HAL_UART_GetState</STRONG> (Thumb, 40 bytes, Stack size 12 bytes, stm32f1xx_hal_uart.o(.text.HAL_UART_GetState))
<BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = HAL_UART_GetState
</UL>
<BR>[Called By]<UL><LI><a href="#[df]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;do_tcp_server_USART2_RX
<LI><a href="#[db]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;do_tcp_server_USART1_RX
</UL>

<P><STRONG><a name="[8f]"></a>HAL_UART_IRQHandler</STRONG> (Thumb, 1066 bytes, Stack size 80 bytes, stm32f1xx_hal_uart.o(.text.HAL_UART_IRQHandler))
<BR><BR>[Stack]<UL><LI>Max Depth = 120<LI>Call Chain = HAL_UART_IRQHandler &rArr; UART_Receive_IT &rArr; HAL_UARTEx_RxEventCallback
</UL>
<BR>[Calls]<UL><LI><a href="#[93]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_ErrorCallback
<LI><a href="#[97]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_EndTransmit_IT
<LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_Transmit_IT
<LI><a href="#[90]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_Receive_IT
<LI><a href="#[91]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_EndRxTransfer
<LI><a href="#[94]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMA_Abort
<LI><a href="#[92]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMA_Abort_IT
<LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UARTEx_RxEventCallback
</UL>
<BR>[Called By]<UL><LI><a href="#[30]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART2_IRQHandler
<LI><a href="#[2f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART1_IRQHandler
</UL>

<P><STRONG><a name="[98]"></a>HAL_UART_Init</STRONG> (Thumb, 158 bytes, Stack size 16 bytes, stm32f1xx_hal_uart.o(.text.HAL_UART_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 176<LI>Call Chain = HAL_UART_Init &rArr; HAL_UART_MspInit &rArr; HAL_NVIC_SetPriority &rArr; NVIC_EncodePriority
</UL>
<BR>[Calls]<UL><LI><a href="#[9a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_SetConfig
<LI><a href="#[99]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_MspInit
</UL>
<BR>[Called By]<UL><LI><a href="#[be]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART2_UART_Init
<LI><a href="#[bd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART1_UART_Init
</UL>

<P><STRONG><a name="[99]"></a>HAL_UART_MspInit</STRONG> (Thumb, 614 bytes, Stack size 96 bytes, usart.o(.text.HAL_UART_MspInit))
<BR><BR>[Stack]<UL><LI>Max Depth = 160<LI>Call Chain = HAL_UART_MspInit &rArr; HAL_NVIC_SetPriority &rArr; NVIC_EncodePriority
</UL>
<BR>[Calls]<UL><LI><a href="#[87]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMA_Init
<LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_EnableIRQ
<LI><a href="#[78]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_SetPriority
<LI><a href="#[72]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_Init
<LI><a href="#[88]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Error_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[98]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_Init
</UL>

<P><STRONG><a name="[9b]"></a>HAL_UART_Receive_DMA</STRONG> (Thumb, 86 bytes, Stack size 24 bytes, stm32f1xx_hal_uart.o(.text.HAL_UART_Receive_DMA))
<BR><BR>[Stack]<UL><LI>Max Depth = 112<LI>Call Chain = HAL_UART_Receive_DMA &rArr; UART_Start_Receive_DMA &rArr; HAL_DMA_Start_IT &rArr; DMA_SetConfig
</UL>
<BR>[Calls]<UL><LI><a href="#[9c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_Start_Receive_DMA
</UL>
<BR>[Called By]<UL><LI><a href="#[d3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_SET_INIT
</UL>

<P><STRONG><a name="[cc]"></a>HAL_UART_RxCpltCallback</STRONG> (Thumb, 8 bytes, Stack size 4 bytes, stm32f1xx_hal_uart.o(.text.HAL_UART_RxCpltCallback))
<BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = HAL_UART_RxCpltCallback
</UL>
<BR>[Called By]<UL><LI><a href="#[90]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_Receive_IT
<LI><a href="#[43]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_DMAReceiveCplt
</UL>

<P><STRONG><a name="[cd]"></a>HAL_UART_RxHalfCpltCallback</STRONG> (Thumb, 8 bytes, Stack size 4 bytes, stm32f1xx_hal_uart.o(.text.HAL_UART_RxHalfCpltCallback))
<BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = HAL_UART_RxHalfCpltCallback
</UL>
<BR>[Called By]<UL><LI><a href="#[44]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_DMARxHalfCplt
</UL>

<P><STRONG><a name="[9d]"></a>HAL_UART_Transmit_DMA</STRONG> (Thumb, 226 bytes, Stack size 32 bytes, stm32f1xx_hal_uart.o(.text.HAL_UART_Transmit_DMA))
<BR><BR>[Stack]<UL><LI>Max Depth = 80<LI>Call Chain = HAL_UART_Transmit_DMA &rArr; HAL_DMA_Start_IT &rArr; DMA_SetConfig
</UL>
<BR>[Calls]<UL><LI><a href="#[66]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMA_Start_IT
</UL>
<BR>[Called By]<UL><LI><a href="#[df]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;do_tcp_server_USART2_RX
<LI><a href="#[db]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;do_tcp_server_USART1_RX
</UL>

<P><STRONG><a name="[ce]"></a>HAL_UART_TxCpltCallback</STRONG> (Thumb, 8 bytes, Stack size 4 bytes, stm32f1xx_hal_uart.o(.text.HAL_UART_TxCpltCallback))
<BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = HAL_UART_TxCpltCallback
</UL>
<BR>[Called By]<UL><LI><a href="#[97]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_EndTransmit_IT
<LI><a href="#[40]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_DMATransmitCplt
</UL>

<P><STRONG><a name="[cf]"></a>HAL_UART_TxHalfCpltCallback</STRONG> (Thumb, 8 bytes, Stack size 4 bytes, stm32f1xx_hal_uart.o(.text.HAL_UART_TxHalfCpltCallback))
<BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = HAL_UART_TxHalfCpltCallback
</UL>
<BR>[Called By]<UL><LI><a href="#[41]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_DMATxHalfCplt
</UL>

<P><STRONG><a name="[9e]"></a>HTTP_SET_TEST</STRONG> (Thumb, 860 bytes, Stack size 424 bytes, http.o(.text.HTTP_SET_TEST))
<BR><BR>[Stack]<UL><LI>Max Depth = 808<LI>Call Chain = HTTP_SET_TEST &rArr; func_analysis_http_request &rArr; send &rArr; send_data_processing &rArr; wiz_write_buf &rArr; IINCHIP_SpiSendData &rArr; HAL_SPI_TransmitReceive &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[a9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;strcmp
<LI><a href="#[49]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr
<LI><a href="#[ae]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memcpy
<LI><a href="#[b1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;change_ip_set
<LI><a href="#[b0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;change_usart_set
<LI><a href="#[ac]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;add_socket_bound_to_http
<LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;add_ip_to_http
<LI><a href="#[aa]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;func_package_http_response
<LI><a href="#[a8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;func_analysis_http_request
<LI><a href="#[a2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;getPHYCFGR
<LI><a href="#[af]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;disconnect
<LI><a href="#[a3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;close
<LI><a href="#[a7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;recv
<LI><a href="#[a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;setSn_IR
<LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;getSn_IR
<LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;send
<LI><a href="#[a1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;listen
<LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;socket
<LI><a href="#[a6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;getSn_RX_RSR
<LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;getSn_SR
</UL>
<BR>[Called By]<UL><LI><a href="#[35]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[2]"></a>HardFault_Handler</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, stm32f1xx_it.o(.text.HardFault_Handler))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[b4]"></a>IINCHIP_READ</STRONG> (Thumb, 66 bytes, Stack size 24 bytes, w5500_conf.o(.text.IINCHIP_READ))
<BR><BR>[Stack]<UL><LI>Max Depth = 184<LI>Call Chain = IINCHIP_READ &rArr; IINCHIP_SpiSendData &rArr; HAL_SPI_TransmitReceive &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[b6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IINCHIP_SpiSendData
<LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;iinchip_cson
<LI><a href="#[b5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;iinchip_csoff
</UL>
<BR>[Called By]<UL><LI><a href="#[a2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;getPHYCFGR
<LI><a href="#[f0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;recv_data_processing
<LI><a href="#[f3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;send_data_processing
<LI><a href="#[e6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;getSn_TX_FSR
<LI><a href="#[af]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;disconnect
<LI><a href="#[a3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;close
<LI><a href="#[a7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;recv
<LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;getSn_IR
<LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;send
<LI><a href="#[a1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;listen
<LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;socket
<LI><a href="#[a6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;getSn_RX_RSR
<LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;getSn_SR
</UL>

<P><STRONG><a name="[b6]"></a>IINCHIP_SpiSendData</STRONG> (Thumb, 46 bytes, Stack size 16 bytes, w5500_conf.o(.text.IINCHIP_SpiSendData))
<BR><BR>[Stack]<UL><LI>Max Depth = 160<LI>Call Chain = IINCHIP_SpiSendData &rArr; HAL_SPI_TransmitReceive &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[8b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_TransmitReceive
</UL>
<BR>[Called By]<UL><LI><a href="#[f4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wiz_write_buf
<LI><a href="#[e3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wiz_read_buf
<LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IINCHIP_READ
<LI><a href="#[b8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IINCHIP_WRITE
</UL>

<P><STRONG><a name="[b8]"></a>IINCHIP_WRITE</STRONG> (Thumb, 58 bytes, Stack size 16 bytes, w5500_conf.o(.text.IINCHIP_WRITE))
<BR><BR>[Stack]<UL><LI>Max Depth = 176<LI>Call Chain = IINCHIP_WRITE &rArr; IINCHIP_SpiSendData &rArr; HAL_SPI_TransmitReceive &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[b6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IINCHIP_SpiSendData
<LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;iinchip_cson
<LI><a href="#[b5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;iinchip_csoff
</UL>
<BR>[Called By]<UL><LI><a href="#[ee]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;socket_buf_init
<LI><a href="#[f0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;recv_data_processing
<LI><a href="#[f3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;send_data_processing
<LI><a href="#[af]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;disconnect
<LI><a href="#[a3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;close
<LI><a href="#[a7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;recv
<LI><a href="#[a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;setSn_IR
<LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;send
<LI><a href="#[a1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;listen
<LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;socket
</UL>

<P><STRONG><a name="[d7]"></a>IP_STR_transfrom_IP</STRONG> (Thumb, 262 bytes, Stack size 20 bytes, http.o(.text.IP_STR_transfrom_IP))
<BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = IP_STR_transfrom_IP
</UL>
<BR>[Called By]<UL><LI><a href="#[b1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;change_ip_set
</UL>

<P><STRONG><a name="[d5]"></a>IP_transfrom_STR</STRONG> (Thumb, 214 bytes, Stack size 52 bytes, http.o(.text.IP_transfrom_STR))
<BR><BR>[Stack]<UL><LI>Max Depth = 52<LI>Call Chain = IP_transfrom_STR
</UL>
<BR>[Called By]<UL><LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;add_ip_to_http
</UL>

<P><STRONG><a name="[b9]"></a>MX_DMA_Init</STRONG> (Thumb, 148 bytes, Stack size 40 bytes, dma.o(.text.MX_DMA_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 104<LI>Call Chain = MX_DMA_Init &rArr; HAL_NVIC_SetPriority &rArr; NVIC_EncodePriority
</UL>
<BR>[Calls]<UL><LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_EnableIRQ
<LI><a href="#[78]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_SetPriority
</UL>
<BR>[Called By]<UL><LI><a href="#[35]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[ba]"></a>MX_GPIO_Init</STRONG> (Thumb, 294 bytes, Stack size 64 bytes, gpio.o(.text.MX_GPIO_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 128<LI>Call Chain = MX_GPIO_Init &rArr; HAL_GPIO_Init
</UL>
<BR>[Calls]<UL><LI><a href="#[72]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_Init
<LI><a href="#[5a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_WritePin
</UL>
<BR>[Called By]<UL><LI><a href="#[35]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[bb]"></a>MX_I2C1_Init</STRONG> (Thumb, 72 bytes, Stack size 16 bytes, i2c.o(.text.MX_I2C1_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 184<LI>Call Chain = MX_I2C1_Init &rArr; HAL_I2C_Init &rArr; HAL_I2C_MspInit &rArr; HAL_GPIO_Init
</UL>
<BR>[Calls]<UL><LI><a href="#[69]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_I2C_Init
<LI><a href="#[88]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Error_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[35]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[bc]"></a>MX_SPI1_Init</STRONG> (Thumb, 82 bytes, Stack size 16 bytes, spi.o(.text.MX_SPI1_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 160<LI>Call Chain = MX_SPI1_Init &rArr; HAL_SPI_Init &rArr; HAL_SPI_MspInit &rArr; HAL_GPIO_Init
</UL>
<BR>[Calls]<UL><LI><a href="#[85]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_Init
<LI><a href="#[88]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Error_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[35]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[bd]"></a>MX_USART1_UART_Init</STRONG> (Thumb, 88 bytes, Stack size 16 bytes, usart.o(.text.MX_USART1_UART_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 192<LI>Call Chain = MX_USART1_UART_Init &rArr; HAL_UART_Init &rArr; HAL_UART_MspInit &rArr; HAL_NVIC_SetPriority &rArr; NVIC_EncodePriority
</UL>
<BR>[Calls]<UL><LI><a href="#[98]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_Init
<LI><a href="#[88]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Error_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[35]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[be]"></a>MX_USART2_UART_Init</STRONG> (Thumb, 88 bytes, Stack size 16 bytes, usart.o(.text.MX_USART2_UART_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 192<LI>Call Chain = MX_USART2_UART_Init &rArr; HAL_UART_Init &rArr; HAL_UART_MspInit &rArr; HAL_NVIC_SetPriority &rArr; NVIC_EncodePriority
</UL>
<BR>[Calls]<UL><LI><a href="#[98]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_Init
<LI><a href="#[88]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Error_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[35]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[3]"></a>MemManage_Handler</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, stm32f1xx_it.o(.text.MemManage_Handler))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[1]"></a>NMI_Handler</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, stm32f1xx_it.o(.text.NMI_Handler))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[8]"></a>PendSV_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f1xx_it.o(.text.PendSV_Handler))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[d8]"></a>STR_transfrom_uint</STRONG> (Thumb, 182 bytes, Stack size 24 bytes, http.o(.text.STR_transfrom_uint))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = STR_transfrom_uint
</UL>
<BR>[Called By]<UL><LI><a href="#[b0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;change_usart_set
</UL>

<P><STRONG><a name="[6]"></a>SVC_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f1xx_it.o(.text.SVC_Handler))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[9]"></a>SysTick_Handler</STRONG> (Thumb, 8 bytes, Stack size 8 bytes, stm32f1xx_it.o(.text.SysTick_Handler))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = SysTick_Handler
</UL>
<BR>[Calls]<UL><LI><a href="#[c8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_IncTick
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[c9]"></a>SystemClock_Config</STRONG> (Thumb, 108 bytes, Stack size 72 bytes, main.o(.text.SystemClock_Config))
<BR><BR>[Stack]<UL><LI>Max Depth = 176<LI>Call Chain = SystemClock_Config &rArr; HAL_RCC_ClockConfig &rArr; HAL_InitTick &rArr; HAL_NVIC_SetPriority &rArr; NVIC_EncodePriority
</UL>
<BR>[Calls]<UL><LI><a href="#[7f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_ClockConfig
<LI><a href="#[88]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Error_Handler
<LI><a href="#[83]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_OscConfig
<LI><a href="#[ca]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr4
</UL>
<BR>[Called By]<UL><LI><a href="#[35]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[36]"></a>SystemInit</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, system_stm32f1xx.o(.text.SystemInit))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(.text)
</UL>
<P><STRONG><a name="[9c]"></a>UART_Start_Receive_DMA</STRONG> (Thumb, 268 bytes, Stack size 40 bytes, stm32f1xx_hal_uart.o(.text.UART_Start_Receive_DMA))
<BR><BR>[Stack]<UL><LI>Max Depth = 88<LI>Call Chain = UART_Start_Receive_DMA &rArr; HAL_DMA_Start_IT &rArr; DMA_SetConfig
</UL>
<BR>[Calls]<UL><LI><a href="#[66]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMA_Start_IT
</UL>
<BR>[Called By]<UL><LI><a href="#[9b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_Receive_DMA
</UL>

<P><STRONG><a name="[2f]"></a>USART1_IRQHandler</STRONG> (Thumb, 20 bytes, Stack size 8 bytes, stm32f1xx_it.o(.text.USART1_IRQHandler))
<BR><BR>[Stack]<UL><LI>Max Depth = 128<LI>Call Chain = USART1_IRQHandler &rArr; HAL_UART_IRQHandler &rArr; UART_Receive_IT &rArr; HAL_UARTEx_RxEventCallback
</UL>
<BR>[Calls]<UL><LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_IRQHandler
<LI><a href="#[d0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART1_IRQ_IDLE_CALLBACK
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[d0]"></a>USART1_IRQ_IDLE_CALLBACK</STRONG> (Thumb, 106 bytes, Stack size 16 bytes, usart1_2.o(.text.USART1_IRQ_IDLE_CALLBACK))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = USART1_IRQ_IDLE_CALLBACK &rArr; queue_in_dma
</UL>
<BR>[Calls]<UL><LI><a href="#[d1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;queue_in_dma
</UL>
<BR>[Called By]<UL><LI><a href="#[2f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART1_IRQHandler
</UL>

<P><STRONG><a name="[65]"></a>USART1_XferHalfCpltCallback2</STRONG> (Thumb, 80 bytes, Stack size 16 bytes, usart1_2.o(.text.USART1_XferHalfCpltCallback2))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = USART1_XferHalfCpltCallback2 &rArr; queue_in_dma
</UL>
<BR>[Calls]<UL><LI><a href="#[d1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;queue_in_dma
</UL>
<BR>[Called By]<UL><LI><a href="#[1a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA1_Channel6_IRQHandler
<LI><a href="#[19]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA1_Channel5_IRQHandler
</UL>

<P><STRONG><a name="[30]"></a>USART2_IRQHandler</STRONG> (Thumb, 20 bytes, Stack size 8 bytes, stm32f1xx_it.o(.text.USART2_IRQHandler))
<BR><BR>[Stack]<UL><LI>Max Depth = 128<LI>Call Chain = USART2_IRQHandler &rArr; HAL_UART_IRQHandler &rArr; UART_Receive_IT &rArr; HAL_UARTEx_RxEventCallback
</UL>
<BR>[Calls]<UL><LI><a href="#[d2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART2_IRQ_IDLE_CALLBACK
<LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_IRQHandler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[d2]"></a>USART2_IRQ_IDLE_CALLBACK</STRONG> (Thumb, 106 bytes, Stack size 16 bytes, usart1_2.o(.text.USART2_IRQ_IDLE_CALLBACK))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = USART2_IRQ_IDLE_CALLBACK &rArr; queue_in_dma
</UL>
<BR>[Calls]<UL><LI><a href="#[d1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;queue_in_dma
</UL>
<BR>[Called By]<UL><LI><a href="#[30]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART2_IRQHandler
</UL>

<P><STRONG><a name="[d3]"></a>USART_SET_INIT</STRONG> (Thumb, 76 bytes, Stack size 16 bytes, usart1_2.o(.text.USART_SET_INIT))
<BR><BR>[Stack]<UL><LI>Max Depth = 128<LI>Call Chain = USART_SET_INIT &rArr; HAL_UART_Receive_DMA &rArr; UART_Start_Receive_DMA &rArr; HAL_DMA_Start_IT &rArr; DMA_SetConfig
</UL>
<BR>[Calls]<UL><LI><a href="#[9b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_Receive_DMA
</UL>
<BR>[Called By]<UL><LI><a href="#[35]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[5]"></a>UsageFault_Handler</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, stm32f1xx_it.o(.text.UsageFault_Handler))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[ab]"></a>add_ip_to_http</STRONG> (Thumb, 168 bytes, Stack size 48 bytes, http.o(.text.add_ip_to_http))
<BR><BR>[Stack]<UL><LI>Max Depth = 100<LI>Call Chain = add_ip_to_http &rArr; IP_transfrom_STR
</UL>
<BR>[Calls]<UL><LI><a href="#[a9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;strcmp
<LI><a href="#[d4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;strstr
<LI><a href="#[d5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IP_transfrom_STR
</UL>
<BR>[Called By]<UL><LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HTTP_SET_TEST
</UL>

<P><STRONG><a name="[ac]"></a>add_socket_bound_to_http</STRONG> (Thumb, 2158 bytes, Stack size 168 bytes, http.o(.text.add_socket_bound_to_http))
<BR><BR>[Stack]<UL><LI>Max Depth = 216<LI>Call Chain = add_socket_bound_to_http &rArr; dectochar
</UL>
<BR>[Calls]<UL><LI><a href="#[a9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;strcmp
<LI><a href="#[d4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;strstr
<LI><a href="#[d6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dectochar
</UL>
<BR>[Called By]<UL><LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HTTP_SET_TEST
</UL>

<P><STRONG><a name="[b1]"></a>change_ip_set</STRONG> (Thumb, 150 bytes, Stack size 48 bytes, http.o(.text.change_ip_set))
<BR><BR>[Stack]<UL><LI>Max Depth = 248<LI>Call Chain = change_ip_set &rArr; AT24C02_save_data &rArr; AT24C02_WRITE &rArr; HAL_I2C_Mem_Write &rArr; I2C_RequestMemoryWrite &rArr; I2C_WaitOnMasterAddressFlagUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[a9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;strcmp
<LI><a href="#[d4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;strstr
<LI><a href="#[d7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IP_STR_transfrom_IP
<LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;AT24C02_save_data
</UL>
<BR>[Called By]<UL><LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HTTP_SET_TEST
</UL>

<P><STRONG><a name="[b0]"></a>change_usart_set</STRONG> (Thumb, 1160 bytes, Stack size 120 bytes, http.o(.text.change_usart_set))
<BR><BR>[Stack]<UL><LI>Max Depth = 320<LI>Call Chain = change_usart_set &rArr; AT24C02_save_data &rArr; AT24C02_WRITE &rArr; HAL_I2C_Mem_Write &rArr; I2C_RequestMemoryWrite &rArr; I2C_WaitOnMasterAddressFlagUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[a9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;strcmp
<LI><a href="#[d4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;strstr
<LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;AT24C02_save_data
<LI><a href="#[d8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;STR_transfrom_uint
</UL>
<BR>[Called By]<UL><LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HTTP_SET_TEST
</UL>

<P><STRONG><a name="[a3]"></a>close</STRONG> (Thumb, 72 bytes, Stack size 16 bytes, socket.o(.text.close))
<BR><BR>[Stack]<UL><LI>Max Depth = 200<LI>Call Chain = close &rArr; IINCHIP_READ &rArr; IINCHIP_SpiSendData &rArr; HAL_SPI_TransmitReceive &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IINCHIP_READ
<LI><a href="#[b8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IINCHIP_WRITE
</UL>
<BR>[Called By]<UL><LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HTTP_SET_TEST
<LI><a href="#[df]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;do_tcp_server_USART2_RX
<LI><a href="#[db]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;do_tcp_server_USART1_RX
<LI><a href="#[a8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;func_analysis_http_request
<LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;send
<LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;socket
</UL>

<P><STRONG><a name="[d6]"></a>dectochar</STRONG> (Thumb, 170 bytes, Stack size 48 bytes, http.o(.text.dectochar))
<BR><BR>[Stack]<UL><LI>Max Depth = 48<LI>Call Chain = dectochar
</UL>
<BR>[Called By]<UL><LI><a href="#[ac]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;add_socket_bound_to_http
</UL>

<P><STRONG><a name="[d9]"></a>delay_ms</STRONG> (Thumb, 16 bytes, Stack size 16 bytes, utility.o(.text.delay_ms))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = delay_ms &rArr; HAL_Delay
</UL>
<BR>[Calls]<UL><LI><a href="#[62]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_Delay
</UL>
<BR>[Called By]<UL><LI><a href="#[ea]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;reset_w5500
<LI><a href="#[fa]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;write_config_to_eeprom
</UL>

<P><STRONG><a name="[da]"></a>delay_us</STRONG> (Thumb, 48 bytes, Stack size 16 bytes, utility.o(.text.delay_us))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = delay_us
</UL>
<BR>[Calls]<UL><LI><a href="#[81]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_GetHCLKFreq
</UL>
<BR>[Called By]<UL><LI><a href="#[ef]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;read_config_from_eeprom
</UL>

<P><STRONG><a name="[af]"></a>disconnect</STRONG> (Thumb, 54 bytes, Stack size 16 bytes, socket.o(.text.disconnect))
<BR><BR>[Stack]<UL><LI>Max Depth = 200<LI>Call Chain = disconnect &rArr; IINCHIP_READ &rArr; IINCHIP_SpiSendData &rArr; HAL_SPI_TransmitReceive &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IINCHIP_READ
<LI><a href="#[b8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IINCHIP_WRITE
</UL>
<BR>[Called By]<UL><LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HTTP_SET_TEST
<LI><a href="#[a8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;func_analysis_http_request
</UL>

<P><STRONG><a name="[db]"></a>do_tcp_server_USART1_RX</STRONG> (Thumb, 460 bytes, Stack size 32 bytes, tcp_uarst.o(.text.do_tcp_server_USART1_RX))
<BR><BR>[Stack]<UL><LI>Max Depth = 320<LI>Call Chain = do_tcp_server_USART1_RX &rArr; queue_out_tcp_dma &rArr; send &rArr; send_data_processing &rArr; wiz_write_buf &rArr; IINCHIP_SpiSendData &rArr; HAL_SPI_TransmitReceive &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[9d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_Transmit_DMA
<LI><a href="#[dd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;queue_out_tcp_dma
<LI><a href="#[dc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;get_queue_use_length
<LI><a href="#[a2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;getPHYCFGR
<LI><a href="#[a3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;close
<LI><a href="#[a7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;recv
<LI><a href="#[a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;setSn_IR
<LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;getSn_IR
<LI><a href="#[a1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;listen
<LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;socket
<LI><a href="#[a6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;getSn_RX_RSR
<LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;getSn_SR
<LI><a href="#[de]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_GetState
</UL>
<BR>[Called By]<UL><LI><a href="#[35]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[df]"></a>do_tcp_server_USART2_RX</STRONG> (Thumb, 460 bytes, Stack size 32 bytes, tcp_uarst.o(.text.do_tcp_server_USART2_RX))
<BR><BR>[Stack]<UL><LI>Max Depth = 320<LI>Call Chain = do_tcp_server_USART2_RX &rArr; queue_out_tcp_dma &rArr; send &rArr; send_data_processing &rArr; wiz_write_buf &rArr; IINCHIP_SpiSendData &rArr; HAL_SPI_TransmitReceive &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[9d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_Transmit_DMA
<LI><a href="#[dd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;queue_out_tcp_dma
<LI><a href="#[dc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;get_queue_use_length
<LI><a href="#[a2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;getPHYCFGR
<LI><a href="#[a3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;close
<LI><a href="#[a7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;recv
<LI><a href="#[a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;setSn_IR
<LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;getSn_IR
<LI><a href="#[a1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;listen
<LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;socket
<LI><a href="#[a6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;getSn_RX_RSR
<LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;getSn_SR
<LI><a href="#[de]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_GetState
</UL>
<BR>[Called By]<UL><LI><a href="#[35]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[45]"></a>fputc</STRONG> (Thumb, 12 bytes, Stack size 8 bytes, w5500.o(.text.fputc))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = fputc
</UL>
<BR>[Address Reference Count : 1]<UL><LI> printfa.o(i.__0printf)
</UL>
<P><STRONG><a name="[a8]"></a>func_analysis_http_request</STRONG> (Thumb, 582 bytes, Stack size 120 bytes, http.o(.text.func_analysis_http_request))
<BR><BR>[Stack]<UL><LI>Max Depth = 384<LI>Call Chain = func_analysis_http_request &rArr; send &rArr; send_data_processing &rArr; wiz_write_buf &rArr; IINCHIP_SpiSendData &rArr; HAL_SPI_TransmitReceive &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[5a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_WritePin
<LI><a href="#[62]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_Delay
<LI><a href="#[a9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;strcmp
<LI><a href="#[d4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;strstr
<LI><a href="#[ae]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memcpy
<LI><a href="#[e0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__NVIC_SystemReset
<LI><a href="#[af]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;disconnect
<LI><a href="#[a3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;close
<LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;send
</UL>
<BR>[Called By]<UL><LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HTTP_SET_TEST
</UL>

<P><STRONG><a name="[aa]"></a>func_package_http_response</STRONG> (Thumb, 64 bytes, Stack size 32 bytes, http.o(.text.func_package_http_response))
<BR><BR>[Stack]<UL><LI>Max Depth = 56<LI>Call Chain = func_package_http_response &rArr; sprintf
</UL>
<BR>[Calls]<UL><LI><a href="#[e1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;sprintf
<LI><a href="#[49]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr
</UL>
<BR>[Called By]<UL><LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HTTP_SET_TEST
</UL>

<P><STRONG><a name="[e2]"></a>getGAR</STRONG> (Thumb, 22 bytes, Stack size 16 bytes, w5500.o(.text.getGAR))
<BR><BR>[Stack]<UL><LI>Max Depth = 200<LI>Call Chain = getGAR &rArr; wiz_read_buf &rArr; IINCHIP_SpiSendData &rArr; HAL_SPI_TransmitReceive &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[e3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wiz_read_buf
</UL>
<BR>[Called By]<UL><LI><a href="#[ec]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;set_w5500_ip
</UL>

<P><STRONG><a name="[f2]"></a>getIINCHIP_TxMAX</STRONG> (Thumb, 26 bytes, Stack size 4 bytes, w5500.o(.text.getIINCHIP_TxMAX))
<BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = getIINCHIP_TxMAX
</UL>
<BR>[Called By]<UL><LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;send
</UL>

<P><STRONG><a name="[a2]"></a>getPHYCFGR</STRONG> (Thumb, 12 bytes, Stack size 8 bytes, w5500.o(.text.getPHYCFGR))
<BR><BR>[Stack]<UL><LI>Max Depth = 192<LI>Call Chain = getPHYCFGR &rArr; IINCHIP_READ &rArr; IINCHIP_SpiSendData &rArr; HAL_SPI_TransmitReceive &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IINCHIP_READ
</UL>
<BR>[Called By]<UL><LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HTTP_SET_TEST
<LI><a href="#[df]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;do_tcp_server_USART2_RX
<LI><a href="#[db]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;do_tcp_server_USART1_RX
</UL>

<P><STRONG><a name="[e4]"></a>getSIPR</STRONG> (Thumb, 22 bytes, Stack size 16 bytes, w5500.o(.text.getSIPR))
<BR><BR>[Stack]<UL><LI>Max Depth = 200<LI>Call Chain = getSIPR &rArr; wiz_read_buf &rArr; IINCHIP_SpiSendData &rArr; HAL_SPI_TransmitReceive &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[e3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wiz_read_buf
</UL>
<BR>[Called By]<UL><LI><a href="#[ec]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;set_w5500_ip
</UL>

<P><STRONG><a name="[e5]"></a>getSUBR</STRONG> (Thumb, 22 bytes, Stack size 16 bytes, w5500.o(.text.getSUBR))
<BR><BR>[Stack]<UL><LI>Max Depth = 200<LI>Call Chain = getSUBR &rArr; wiz_read_buf &rArr; IINCHIP_SpiSendData &rArr; HAL_SPI_TransmitReceive &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[e3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wiz_read_buf
</UL>
<BR>[Called By]<UL><LI><a href="#[ec]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;set_w5500_ip
</UL>

<P><STRONG><a name="[a4]"></a>getSn_IR</STRONG> (Thumb, 28 bytes, Stack size 16 bytes, w5500.o(.text.getSn_IR))
<BR><BR>[Stack]<UL><LI>Max Depth = 200<LI>Call Chain = getSn_IR &rArr; IINCHIP_READ &rArr; IINCHIP_SpiSendData &rArr; HAL_SPI_TransmitReceive &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IINCHIP_READ
</UL>
<BR>[Called By]<UL><LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HTTP_SET_TEST
<LI><a href="#[df]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;do_tcp_server_USART2_RX
<LI><a href="#[db]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;do_tcp_server_USART1_RX
</UL>

<P><STRONG><a name="[a6]"></a>getSn_RX_RSR</STRONG> (Thumb, 158 bytes, Stack size 24 bytes, w5500.o(.text.getSn_RX_RSR))
<BR><BR>[Stack]<UL><LI>Max Depth = 208<LI>Call Chain = getSn_RX_RSR &rArr; IINCHIP_READ &rArr; IINCHIP_SpiSendData &rArr; HAL_SPI_TransmitReceive &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IINCHIP_READ
</UL>
<BR>[Called By]<UL><LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HTTP_SET_TEST
<LI><a href="#[df]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;do_tcp_server_USART2_RX
<LI><a href="#[db]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;do_tcp_server_USART1_RX
</UL>

<P><STRONG><a name="[9f]"></a>getSn_SR</STRONG> (Thumb, 28 bytes, Stack size 16 bytes, w5500.o(.text.getSn_SR))
<BR><BR>[Stack]<UL><LI>Max Depth = 200<LI>Call Chain = getSn_SR &rArr; IINCHIP_READ &rArr; IINCHIP_SpiSendData &rArr; HAL_SPI_TransmitReceive &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IINCHIP_READ
</UL>
<BR>[Called By]<UL><LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HTTP_SET_TEST
<LI><a href="#[df]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;do_tcp_server_USART2_RX
<LI><a href="#[db]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;do_tcp_server_USART1_RX
</UL>

<P><STRONG><a name="[e6]"></a>getSn_TX_FSR</STRONG> (Thumb, 158 bytes, Stack size 24 bytes, w5500.o(.text.getSn_TX_FSR))
<BR><BR>[Stack]<UL><LI>Max Depth = 208<LI>Call Chain = getSn_TX_FSR &rArr; IINCHIP_READ &rArr; IINCHIP_SpiSendData &rArr; HAL_SPI_TransmitReceive &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IINCHIP_READ
</UL>
<BR>[Called By]<UL><LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;send
</UL>

<P><STRONG><a name="[dc]"></a>get_queue_use_length</STRONG> (Thumb, 62 bytes, Stack size 8 bytes, queue_list.o(.text.get_queue_use_length))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = get_queue_use_length
</UL>
<BR>[Called By]<UL><LI><a href="#[df]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;do_tcp_server_USART2_RX
<LI><a href="#[db]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;do_tcp_server_USART1_RX
<LI><a href="#[dd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;queue_out_tcp_dma
</UL>

<P><STRONG><a name="[e8]"></a>http_at24_data_init</STRONG> (Thumb, 64 bytes, Stack size 0 bytes, http.o(.text.http_at24_data_init))
<BR><BR>[Called By]<UL><LI><a href="#[35]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[b5]"></a>iinchip_csoff</STRONG> (Thumb, 10 bytes, Stack size 8 bytes, w5500_conf.o(.text.iinchip_csoff))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = iinchip_csoff &rArr; wiz_cs &rArr; HAL_GPIO_WritePin
</UL>
<BR>[Calls]<UL><LI><a href="#[e7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wiz_cs
</UL>
<BR>[Called By]<UL><LI><a href="#[f4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wiz_write_buf
<LI><a href="#[e3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wiz_read_buf
<LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IINCHIP_READ
<LI><a href="#[b8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IINCHIP_WRITE
</UL>

<P><STRONG><a name="[b7]"></a>iinchip_cson</STRONG> (Thumb, 10 bytes, Stack size 8 bytes, w5500_conf.o(.text.iinchip_cson))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = iinchip_cson &rArr; wiz_cs &rArr; HAL_GPIO_WritePin
</UL>
<BR>[Calls]<UL><LI><a href="#[e7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wiz_cs
</UL>
<BR>[Called By]<UL><LI><a href="#[f4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wiz_write_buf
<LI><a href="#[e3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wiz_read_buf
<LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IINCHIP_READ
<LI><a href="#[b8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IINCHIP_WRITE
</UL>

<P><STRONG><a name="[f9]"></a>ip_select</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, w5500_conf.o(.text.ip_select))
<BR><BR>[Called By]<UL><LI><a href="#[ec]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;set_w5500_ip
</UL>

<P><STRONG><a name="[ed]"></a>keep_alive</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, tcp_uarst.o(.text.keep_alive))
<BR><BR>[Called By]<UL><LI><a href="#[35]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[a1]"></a>listen</STRONG> (Thumb, 96 bytes, Stack size 16 bytes, socket.o(.text.listen))
<BR><BR>[Stack]<UL><LI>Max Depth = 200<LI>Call Chain = listen &rArr; IINCHIP_READ &rArr; IINCHIP_SpiSendData &rArr; HAL_SPI_TransmitReceive &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IINCHIP_READ
<LI><a href="#[b8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IINCHIP_WRITE
</UL>
<BR>[Called By]<UL><LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HTTP_SET_TEST
<LI><a href="#[df]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;do_tcp_server_USART2_RX
<LI><a href="#[db]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;do_tcp_server_USART1_RX
</UL>

<P><STRONG><a name="[35]"></a>main</STRONG> (Thumb, 186 bytes, Stack size 16 bytes, main.o(.text.main))
<BR><BR>[Stack]<UL><LI>Max Depth = 824<LI>Call Chain = main &rArr; HTTP_SET_TEST &rArr; func_analysis_http_request &rArr; send &rArr; send_data_processing &rArr; wiz_write_buf &rArr; IINCHIP_SpiSendData &rArr; HAL_SPI_TransmitReceive &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[5a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_WritePin
<LI><a href="#[5b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_ReadPin
<LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HTTP_SET_TEST
<LI><a href="#[df]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;do_tcp_server_USART2_RX
<LI><a href="#[db]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;do_tcp_server_USART1_RX
<LI><a href="#[d3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART_SET_INIT
<LI><a href="#[ee]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;socket_buf_init
<LI><a href="#[ed]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;keep_alive
<LI><a href="#[ec]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;set_w5500_ip
<LI><a href="#[eb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;set_w5500_mac
<LI><a href="#[ea]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;reset_w5500
<LI><a href="#[e9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;queue_rx_init
<LI><a href="#[be]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART2_UART_Init
<LI><a href="#[bd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART1_UART_Init
<LI><a href="#[bc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_SPI1_Init
<LI><a href="#[b9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_DMA_Init
<LI><a href="#[62]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_Delay
<LI><a href="#[59]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;AT24C02_INIT
<LI><a href="#[e8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;http_at24_data_init
<LI><a href="#[bb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_I2C1_Init
<LI><a href="#[ba]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_GPIO_Init
<LI><a href="#[c9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SystemClock_Config
<LI><a href="#[73]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_Init
</UL>
<BR>[Address Reference Count : 1]<UL><LI> entry9a.o(.ARM.Collect$$$$0000000B)
</UL>
<P><STRONG><a name="[d1]"></a>queue_in_dma</STRONG> (Thumb, 22 bytes, Stack size 8 bytes, queue_list.o(.text.queue_in_dma))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = queue_in_dma
</UL>
<BR>[Called By]<UL><LI><a href="#[d2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART2_IRQ_IDLE_CALLBACK
<LI><a href="#[d0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART1_IRQ_IDLE_CALLBACK
<LI><a href="#[65]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART1_XferHalfCpltCallback2
</UL>

<P><STRONG><a name="[dd]"></a>queue_out_tcp_dma</STRONG> (Thumb, 142 bytes, Stack size 24 bytes, queue_list.o(.text.queue_out_tcp_dma))
<BR><BR>[Stack]<UL><LI>Max Depth = 288<LI>Call Chain = queue_out_tcp_dma &rArr; send &rArr; send_data_processing &rArr; wiz_write_buf &rArr; IINCHIP_SpiSendData &rArr; HAL_SPI_TransmitReceive &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[dc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;get_queue_use_length
<LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;send
</UL>
<BR>[Called By]<UL><LI><a href="#[df]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;do_tcp_server_USART2_RX
<LI><a href="#[db]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;do_tcp_server_USART1_RX
</UL>

<P><STRONG><a name="[e9]"></a>queue_rx_init</STRONG> (Thumb, 66 bytes, Stack size 0 bytes, queue_list.o(.text.queue_rx_init))
<BR><BR>[Called By]<UL><LI><a href="#[35]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[ef]"></a>read_config_from_eeprom</STRONG> (Thumb, 10 bytes, Stack size 8 bytes, w5500_conf.o(.text.read_config_from_eeprom))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = read_config_from_eeprom &rArr; delay_us
</UL>
<BR>[Calls]<UL><LI><a href="#[da]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;delay_us
</UL>
<BR>[Called By]<UL><LI><a href="#[ec]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;set_w5500_ip
</UL>

<P><STRONG><a name="[a7]"></a>recv</STRONG> (Thumb, 104 bytes, Stack size 24 bytes, socket.o(.text.recv))
<BR><BR>[Stack]<UL><LI>Max Depth = 248<LI>Call Chain = recv &rArr; recv_data_processing &rArr; wiz_read_buf &rArr; IINCHIP_SpiSendData &rArr; HAL_SPI_TransmitReceive &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[f0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;recv_data_processing
<LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IINCHIP_READ
<LI><a href="#[b8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IINCHIP_WRITE
</UL>
<BR>[Called By]<UL><LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HTTP_SET_TEST
<LI><a href="#[df]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;do_tcp_server_USART2_RX
<LI><a href="#[db]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;do_tcp_server_USART1_RX
</UL>

<P><STRONG><a name="[f0]"></a>recv_data_processing</STRONG> (Thumb, 190 bytes, Stack size 40 bytes, w5500.o(.text.recv_data_processing))
<BR><BR>[Stack]<UL><LI>Max Depth = 224<LI>Call Chain = recv_data_processing &rArr; wiz_read_buf &rArr; IINCHIP_SpiSendData &rArr; HAL_SPI_TransmitReceive &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[f1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;printf
<LI><a href="#[e3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wiz_read_buf
<LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IINCHIP_READ
<LI><a href="#[b8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IINCHIP_WRITE
</UL>
<BR>[Called By]<UL><LI><a href="#[a7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;recv
</UL>

<P><STRONG><a name="[ea]"></a>reset_w5500</STRONG> (Thumb, 54 bytes, Stack size 24 bytes, w5500_conf.o(.text.reset_w5500))
<BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = reset_w5500 &rArr; delay_ms &rArr; HAL_Delay
</UL>
<BR>[Calls]<UL><LI><a href="#[5a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_WritePin
<LI><a href="#[d9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;delay_ms
</UL>
<BR>[Called By]<UL><LI><a href="#[35]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[ad]"></a>send</STRONG> (Thumb, 364 bytes, Stack size 40 bytes, socket.o(.text.send))
<BR><BR>[Stack]<UL><LI>Max Depth = 264<LI>Call Chain = send &rArr; send_data_processing &rArr; wiz_write_buf &rArr; IINCHIP_SpiSendData &rArr; HAL_SPI_TransmitReceive &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[f1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;printf
<LI><a href="#[f3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;send_data_processing
<LI><a href="#[e6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;getSn_TX_FSR
<LI><a href="#[f2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;getIINCHIP_TxMAX
<LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IINCHIP_READ
<LI><a href="#[b8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IINCHIP_WRITE
<LI><a href="#[a3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;close
</UL>
<BR>[Called By]<UL><LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HTTP_SET_TEST
<LI><a href="#[a8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;func_analysis_http_request
<LI><a href="#[dd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;queue_out_tcp_dma
</UL>

<P><STRONG><a name="[f3]"></a>send_data_processing</STRONG> (Thumb, 174 bytes, Stack size 40 bytes, w5500.o(.text.send_data_processing))
<BR><BR>[Stack]<UL><LI>Max Depth = 224<LI>Call Chain = send_data_processing &rArr; wiz_write_buf &rArr; IINCHIP_SpiSendData &rArr; HAL_SPI_TransmitReceive &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[f4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wiz_write_buf
<LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IINCHIP_READ
<LI><a href="#[b8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IINCHIP_WRITE
</UL>
<BR>[Called By]<UL><LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;send
</UL>

<P><STRONG><a name="[f5]"></a>setGAR</STRONG> (Thumb, 22 bytes, Stack size 16 bytes, w5500.o(.text.setGAR))
<BR><BR>[Stack]<UL><LI>Max Depth = 200<LI>Call Chain = setGAR &rArr; wiz_write_buf &rArr; IINCHIP_SpiSendData &rArr; HAL_SPI_TransmitReceive &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[f4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wiz_write_buf
</UL>
<BR>[Called By]<UL><LI><a href="#[ec]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;set_w5500_ip
</UL>

<P><STRONG><a name="[f6]"></a>setSHAR</STRONG> (Thumb, 22 bytes, Stack size 16 bytes, w5500.o(.text.setSHAR))
<BR><BR>[Stack]<UL><LI>Max Depth = 200<LI>Call Chain = setSHAR &rArr; wiz_write_buf &rArr; IINCHIP_SpiSendData &rArr; HAL_SPI_TransmitReceive &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[f4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wiz_write_buf
</UL>
<BR>[Called By]<UL><LI><a href="#[eb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;set_w5500_mac
</UL>

<P><STRONG><a name="[f7]"></a>setSIPR</STRONG> (Thumb, 22 bytes, Stack size 16 bytes, w5500.o(.text.setSIPR))
<BR><BR>[Stack]<UL><LI>Max Depth = 200<LI>Call Chain = setSIPR &rArr; wiz_write_buf &rArr; IINCHIP_SpiSendData &rArr; HAL_SPI_TransmitReceive &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[f4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wiz_write_buf
</UL>
<BR>[Called By]<UL><LI><a href="#[ec]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;set_w5500_ip
</UL>

<P><STRONG><a name="[f8]"></a>setSUBR</STRONG> (Thumb, 22 bytes, Stack size 16 bytes, w5500.o(.text.setSUBR))
<BR><BR>[Stack]<UL><LI>Max Depth = 200<LI>Call Chain = setSUBR &rArr; wiz_write_buf &rArr; IINCHIP_SpiSendData &rArr; HAL_SPI_TransmitReceive &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[f4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wiz_write_buf
</UL>
<BR>[Called By]<UL><LI><a href="#[ec]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;set_w5500_ip
</UL>

<P><STRONG><a name="[a5]"></a>setSn_IR</STRONG> (Thumb, 36 bytes, Stack size 16 bytes, w5500.o(.text.setSn_IR))
<BR><BR>[Stack]<UL><LI>Max Depth = 192<LI>Call Chain = setSn_IR &rArr; IINCHIP_WRITE &rArr; IINCHIP_SpiSendData &rArr; HAL_SPI_TransmitReceive &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[b8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IINCHIP_WRITE
</UL>
<BR>[Called By]<UL><LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HTTP_SET_TEST
<LI><a href="#[df]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;do_tcp_server_USART2_RX
<LI><a href="#[db]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;do_tcp_server_USART1_RX
</UL>

<P><STRONG><a name="[ec]"></a>set_w5500_ip</STRONG> (Thumb, 548 bytes, Stack size 32 bytes, w5500_conf.o(.text.set_w5500_ip))
<BR><BR>[Stack]<UL><LI>Max Depth = 232<LI>Call Chain = set_w5500_ip &rArr; getSIPR &rArr; wiz_read_buf &rArr; IINCHIP_SpiSendData &rArr; HAL_SPI_TransmitReceive &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[f1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;printf
<LI><a href="#[fa]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;write_config_to_eeprom
<LI><a href="#[ef]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;read_config_from_eeprom
<LI><a href="#[f9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ip_select
<LI><a href="#[e4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;getSIPR
<LI><a href="#[e5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;getSUBR
<LI><a href="#[e2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;getGAR
<LI><a href="#[f7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;setSIPR
<LI><a href="#[f5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;setGAR
<LI><a href="#[f8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;setSUBR
</UL>
<BR>[Called By]<UL><LI><a href="#[35]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[eb]"></a>set_w5500_mac</STRONG> (Thumb, 56 bytes, Stack size 16 bytes, w5500_conf.o(.text.set_w5500_mac))
<BR><BR>[Stack]<UL><LI>Max Depth = 216<LI>Call Chain = set_w5500_mac &rArr; setSHAR &rArr; wiz_write_buf &rArr; IINCHIP_SpiSendData &rArr; HAL_SPI_TransmitReceive &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[f6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;setSHAR
</UL>
<BR>[Called By]<UL><LI><a href="#[35]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[a0]"></a>socket</STRONG> (Thumb, 292 bytes, Stack size 24 bytes, socket.o(.text.socket))
<BR><BR>[Stack]<UL><LI>Max Depth = 224<LI>Call Chain = socket &rArr; close &rArr; IINCHIP_READ &rArr; IINCHIP_SpiSendData &rArr; HAL_SPI_TransmitReceive &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IINCHIP_READ
<LI><a href="#[b8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IINCHIP_WRITE
<LI><a href="#[a3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;close
</UL>
<BR>[Called By]<UL><LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HTTP_SET_TEST
<LI><a href="#[df]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;do_tcp_server_USART2_RX
<LI><a href="#[db]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;do_tcp_server_USART1_RX
</UL>

<P><STRONG><a name="[ee]"></a>socket_buf_init</STRONG> (Thumb, 210 bytes, Stack size 32 bytes, w5500.o(.text.socket_buf_init))
<BR><BR>[Stack]<UL><LI>Max Depth = 208<LI>Call Chain = socket_buf_init &rArr; IINCHIP_WRITE &rArr; IINCHIP_SpiSendData &rArr; HAL_SPI_TransmitReceive &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[b8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IINCHIP_WRITE
</UL>
<BR>[Called By]<UL><LI><a href="#[35]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[e7]"></a>wiz_cs</STRONG> (Thumb, 68 bytes, Stack size 16 bytes, w5500_conf.o(.text.wiz_cs))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = wiz_cs &rArr; HAL_GPIO_WritePin
</UL>
<BR>[Calls]<UL><LI><a href="#[5a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_WritePin
</UL>
<BR>[Called By]<UL><LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;iinchip_cson
<LI><a href="#[b5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;iinchip_csoff
</UL>

<P><STRONG><a name="[e3]"></a>wiz_read_buf</STRONG> (Thumb, 116 bytes, Stack size 24 bytes, w5500_conf.o(.text.wiz_read_buf))
<BR><BR>[Stack]<UL><LI>Max Depth = 184<LI>Call Chain = wiz_read_buf &rArr; IINCHIP_SpiSendData &rArr; HAL_SPI_TransmitReceive &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[fb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_GetState
<LI><a href="#[89]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_Receive_DMA
<LI><a href="#[f1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;printf
<LI><a href="#[b6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IINCHIP_SpiSendData
<LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;iinchip_cson
<LI><a href="#[b5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;iinchip_csoff
</UL>
<BR>[Called By]<UL><LI><a href="#[e4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;getSIPR
<LI><a href="#[e5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;getSUBR
<LI><a href="#[e2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;getGAR
<LI><a href="#[f0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;recv_data_processing
</UL>

<P><STRONG><a name="[f4]"></a>wiz_write_buf</STRONG> (Thumb, 118 bytes, Stack size 24 bytes, w5500_conf.o(.text.wiz_write_buf))
<BR><BR>[Stack]<UL><LI>Max Depth = 184<LI>Call Chain = wiz_write_buf &rArr; IINCHIP_SpiSendData &rArr; HAL_SPI_TransmitReceive &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[fb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_GetState
<LI><a href="#[8d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_Transmit_DMA
<LI><a href="#[f1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;printf
<LI><a href="#[b6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IINCHIP_SpiSendData
<LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;iinchip_cson
<LI><a href="#[b5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;iinchip_csoff
</UL>
<BR>[Called By]<UL><LI><a href="#[f6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;setSHAR
<LI><a href="#[f3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;send_data_processing
<LI><a href="#[f7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;setSIPR
<LI><a href="#[f5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;setGAR
<LI><a href="#[f8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;setSUBR
</UL>

<P><STRONG><a name="[fa]"></a>write_config_to_eeprom</STRONG> (Thumb, 20 bytes, Stack size 16 bytes, w5500_conf.o(.text.write_config_to_eeprom))
<BR><BR>[Stack]<UL><LI>Max Depth = 56<LI>Call Chain = write_config_to_eeprom &rArr; delay_ms &rArr; HAL_Delay
</UL>
<BR>[Calls]<UL><LI><a href="#[d9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;delay_ms
</UL>
<BR>[Called By]<UL><LI><a href="#[ec]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;set_w5500_ip
</UL>

<P><STRONG><a name="[fc]"></a>__0printf</STRONG> (Thumb, 22 bytes, Stack size 24 bytes, printfa.o(i.__0printf), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[fd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_core
</UL>

<P><STRONG><a name="[115]"></a>__1printf</STRONG> (Thumb, 0 bytes, Stack size 24 bytes, printfa.o(i.__0printf), UNUSED)

<P><STRONG><a name="[116]"></a>__2printf</STRONG> (Thumb, 0 bytes, Stack size 24 bytes, printfa.o(i.__0printf), UNUSED)

<P><STRONG><a name="[117]"></a>__c89printf</STRONG> (Thumb, 0 bytes, Stack size 24 bytes, printfa.o(i.__0printf), UNUSED)

<P><STRONG><a name="[f1]"></a>printf</STRONG> (Thumb, 0 bytes, Stack size 24 bytes, printfa.o(i.__0printf))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = printf
</UL>
<BR>[Called By]<UL><LI><a href="#[ec]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;set_w5500_ip
<LI><a href="#[f4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wiz_write_buf
<LI><a href="#[e3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;wiz_read_buf
<LI><a href="#[f0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;recv_data_processing
<LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;send
</UL>

<P><STRONG><a name="[fe]"></a>__0sprintf</STRONG> (Thumb, 34 bytes, Stack size 24 bytes, printfa.o(i.__0sprintf), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_sputc
<LI><a href="#[fd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_core
</UL>

<P><STRONG><a name="[118]"></a>__1sprintf</STRONG> (Thumb, 0 bytes, Stack size 24 bytes, printfa.o(i.__0sprintf), UNUSED)

<P><STRONG><a name="[119]"></a>__2sprintf</STRONG> (Thumb, 0 bytes, Stack size 24 bytes, printfa.o(i.__0sprintf), UNUSED)

<P><STRONG><a name="[11a]"></a>__c89sprintf</STRONG> (Thumb, 0 bytes, Stack size 24 bytes, printfa.o(i.__0sprintf), UNUSED)

<P><STRONG><a name="[e1]"></a>sprintf</STRONG> (Thumb, 0 bytes, Stack size 24 bytes, printfa.o(i.__0sprintf))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = sprintf
</UL>
<BR>[Called By]<UL><LI><a href="#[aa]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;func_package_http_response
</UL>

<P><STRONG><a name="[11b]"></a>__scatterload_copy</STRONG> (Thumb, 14 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_copy), UNUSED)

<P><STRONG><a name="[11c]"></a>__scatterload_null</STRONG> (Thumb, 2 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_null), UNUSED)

<P><STRONG><a name="[11d]"></a>__scatterload_zeroinit</STRONG> (Thumb, 14 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_zeroinit), UNUSED)
<P>
<H3>
Local Symbols
</H3>
<P><STRONG><a name="[6c]"></a>I2C_WaitOnFlagUntilTimeout</STRONG> (Thumb, 264 bytes, Stack size 40 bytes, stm32f1xx_hal_i2c.o(.text.I2C_WaitOnFlagUntilTimeout))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = I2C_WaitOnFlagUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[68]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
</UL>
<BR>[Called By]<UL><LI><a href="#[5f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_I2C_Mem_Read
<LI><a href="#[61]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_I2C_Mem_Write
<LI><a href="#[6d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;I2C_RequestMemoryRead
<LI><a href="#[6f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;I2C_RequestMemoryWrite
</UL>

<P><STRONG><a name="[70]"></a>I2C_WaitOnTXEFlagUntilTimeout</STRONG> (Thumb, 168 bytes, Stack size 24 bytes, stm32f1xx_hal_i2c.o(.text.I2C_WaitOnTXEFlagUntilTimeout))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = I2C_WaitOnTXEFlagUntilTimeout &rArr; I2C_IsAcknowledgeFailed
</UL>
<BR>[Calls]<UL><LI><a href="#[68]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
<LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;I2C_IsAcknowledgeFailed
</UL>
<BR>[Called By]<UL><LI><a href="#[61]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_I2C_Mem_Write
<LI><a href="#[6d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;I2C_RequestMemoryRead
<LI><a href="#[6f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;I2C_RequestMemoryWrite
</UL>

<P><STRONG><a name="[71]"></a>I2C_WaitOnBTFFlagUntilTimeout</STRONG> (Thumb, 172 bytes, Stack size 24 bytes, stm32f1xx_hal_i2c.o(.text.I2C_WaitOnBTFFlagUntilTimeout))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = I2C_WaitOnBTFFlagUntilTimeout &rArr; I2C_IsAcknowledgeFailed
</UL>
<BR>[Calls]<UL><LI><a href="#[68]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
<LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;I2C_IsAcknowledgeFailed
</UL>
<BR>[Called By]<UL><LI><a href="#[61]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_I2C_Mem_Write
</UL>

<P><STRONG><a name="[b2]"></a>I2C_WaitOnMasterAddressFlagUntilTimeout</STRONG> (Thumb, 340 bytes, Stack size 40 bytes, stm32f1xx_hal_i2c.o(.text.I2C_WaitOnMasterAddressFlagUntilTimeout))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = I2C_WaitOnMasterAddressFlagUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[68]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
</UL>
<BR>[Called By]<UL><LI><a href="#[6d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;I2C_RequestMemoryRead
<LI><a href="#[6f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;I2C_RequestMemoryWrite
</UL>

<P><STRONG><a name="[b3]"></a>I2C_IsAcknowledgeFailed</STRONG> (Thumb, 100 bytes, Stack size 8 bytes, stm32f1xx_hal_i2c.o(.text.I2C_IsAcknowledgeFailed))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = I2C_IsAcknowledgeFailed
</UL>
<BR>[Called By]<UL><LI><a href="#[71]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;I2C_WaitOnBTFFlagUntilTimeout
<LI><a href="#[70]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;I2C_WaitOnTXEFlagUntilTimeout
</UL>

<P><STRONG><a name="[6e]"></a>I2C_WaitOnRXNEFlagUntilTimeout</STRONG> (Thumb, 220 bytes, Stack size 24 bytes, stm32f1xx_hal_i2c.o(.text.I2C_WaitOnRXNEFlagUntilTimeout))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = I2C_WaitOnRXNEFlagUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[68]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
</UL>
<BR>[Called By]<UL><LI><a href="#[5f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_I2C_Mem_Read
</UL>

<P><STRONG><a name="[6f]"></a>I2C_RequestMemoryWrite</STRONG> (Thumb, 314 bytes, Stack size 32 bytes, stm32f1xx_hal_i2c.o(.text.I2C_RequestMemoryWrite))
<BR><BR>[Stack]<UL><LI>Max Depth = 72<LI>Call Chain = I2C_RequestMemoryWrite &rArr; I2C_WaitOnMasterAddressFlagUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[b2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;I2C_WaitOnMasterAddressFlagUntilTimeout
<LI><a href="#[70]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;I2C_WaitOnTXEFlagUntilTimeout
<LI><a href="#[6c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;I2C_WaitOnFlagUntilTimeout
</UL>
<BR>[Called By]<UL><LI><a href="#[61]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_I2C_Mem_Write
</UL>

<P><STRONG><a name="[6d]"></a>I2C_RequestMemoryRead</STRONG> (Thumb, 482 bytes, Stack size 32 bytes, stm32f1xx_hal_i2c.o(.text.I2C_RequestMemoryRead))
<BR><BR>[Stack]<UL><LI>Max Depth = 72<LI>Call Chain = I2C_RequestMemoryRead &rArr; I2C_WaitOnMasterAddressFlagUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[b2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;I2C_WaitOnMasterAddressFlagUntilTimeout
<LI><a href="#[70]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;I2C_WaitOnTXEFlagUntilTimeout
<LI><a href="#[6c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;I2C_WaitOnFlagUntilTimeout
</UL>
<BR>[Called By]<UL><LI><a href="#[5f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_I2C_Mem_Read
</UL>

<P><STRONG><a name="[84]"></a>RCC_Delay</STRONG> (Thumb, 58 bytes, Stack size 8 bytes, stm32f1xx_hal_rcc.o(.text.RCC_Delay))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = RCC_Delay
</UL>
<BR>[Called By]<UL><LI><a href="#[83]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_OscConfig
</UL>

<P><STRONG><a name="[67]"></a>DMA_SetConfig</STRONG> (Thumb, 80 bytes, Stack size 16 bytes, stm32f1xx_hal_dma.o(.text.DMA_SetConfig))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = DMA_SetConfig
</UL>
<BR>[Called By]<UL><LI><a href="#[66]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMA_Start_IT
</UL>

<P><STRONG><a name="[7e]"></a>__NVIC_SetPriorityGrouping</STRONG> (Thumb, 60 bytes, Stack size 12 bytes, stm32f1xx_hal_cortex.o(.text.__NVIC_SetPriorityGrouping))
<BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = __NVIC_SetPriorityGrouping
</UL>
<BR>[Called By]<UL><LI><a href="#[74]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_SetPriorityGrouping
</UL>

<P><STRONG><a name="[7b]"></a>__NVIC_GetPriorityGrouping</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, stm32f1xx_hal_cortex.o(.text.__NVIC_GetPriorityGrouping))
<BR><BR>[Called By]<UL><LI><a href="#[78]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_SetPriority
</UL>

<P><STRONG><a name="[7c]"></a>NVIC_EncodePriority</STRONG> (Thumb, 108 bytes, Stack size 32 bytes, stm32f1xx_hal_cortex.o(.text.NVIC_EncodePriority))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = NVIC_EncodePriority
</UL>
<BR>[Called By]<UL><LI><a href="#[78]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_SetPriority
</UL>

<P><STRONG><a name="[7d]"></a>__NVIC_SetPriority</STRONG> (Thumb, 66 bytes, Stack size 8 bytes, stm32f1xx_hal_cortex.o(.text.__NVIC_SetPriority))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = __NVIC_SetPriority
</UL>
<BR>[Called By]<UL><LI><a href="#[8e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SysTick_Config
<LI><a href="#[78]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_SetPriority
</UL>

<P><STRONG><a name="[7a]"></a>__NVIC_EnableIRQ</STRONG> (Thumb, 48 bytes, Stack size 4 bytes, stm32f1xx_hal_cortex.o(.text.__NVIC_EnableIRQ))
<BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = __NVIC_EnableIRQ
</UL>
<BR>[Called By]<UL><LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_EnableIRQ
</UL>

<P><STRONG><a name="[8e]"></a>SysTick_Config</STRONG> (Thumb, 82 bytes, Stack size 16 bytes, stm32f1xx_hal_cortex.o(.text.SysTick_Config))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = SysTick_Config &rArr; __NVIC_SetPriority
</UL>
<BR>[Calls]<UL><LI><a href="#[7d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__NVIC_SetPriority
</UL>
<BR>[Called By]<UL><LI><a href="#[77]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SYSTICK_Config
</UL>

<P><STRONG><a name="[8c]"></a>SPI_EndRxTxTransaction</STRONG> (Thumb, 66 bytes, Stack size 32 bytes, stm32f1xx_hal_spi.o(.text.SPI_EndRxTxTransaction))
<BR><BR>[Stack]<UL><LI>Max Depth = 80<LI>Call Chain = SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[c7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Called By]<UL><LI><a href="#[8b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_TransmitReceive
<LI><a href="#[3c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_DMATransmitReceiveCplt
<LI><a href="#[3e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_DMATransmitCplt
</UL>

<P><STRONG><a name="[c7]"></a>SPI_WaitFlagStateUntilTimeout</STRONG> (Thumb, 298 bytes, Stack size 48 bytes, stm32f1xx_hal_spi.o(.text.SPI_WaitFlagStateUntilTimeout))
<BR><BR>[Stack]<UL><LI>Max Depth = 48<LI>Call Chain = SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[68]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
</UL>
<BR>[Called By]<UL><LI><a href="#[c3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_EndRxTransaction
<LI><a href="#[8c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_EndRxTxTransaction
</UL>

<P><STRONG><a name="[c3]"></a>SPI_EndRxTransaction</STRONG> (Thumb, 184 bytes, Stack size 32 bytes, stm32f1xx_hal_spi.o(.text.SPI_EndRxTransaction))
<BR><BR>[Stack]<UL><LI>Max Depth = 80<LI>Call Chain = SPI_EndRxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[c7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Called By]<UL><LI><a href="#[39]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_DMAReceiveCplt
</UL>

<P><STRONG><a name="[3d]"></a>SPI_DMAHalfTransmitCplt</STRONG> (Thumb, 22 bytes, Stack size 16 bytes, stm32f1xx_hal_spi.o(.text.SPI_DMAHalfTransmitCplt))
<BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = SPI_DMAHalfTransmitCplt &rArr; HAL_SPI_TxHalfCpltCallback
</UL>
<BR>[Calls]<UL><LI><a href="#[c1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_TxHalfCpltCallback
</UL>
<BR>[Address Reference Count : 1]<UL><LI> stm32f1xx_hal_spi.o(.text.HAL_SPI_Transmit_DMA)
</UL>
<P><STRONG><a name="[3e]"></a>SPI_DMATransmitCplt</STRONG> (Thumb, 164 bytes, Stack size 24 bytes, stm32f1xx_hal_spi.o(.text.SPI_DMATransmitCplt))
<BR><BR>[Stack]<UL><LI>Max Depth = 104<LI>Call Chain = SPI_DMATransmitCplt &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[c5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_TxCpltCallback
<LI><a href="#[bf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_ErrorCallback
<LI><a href="#[8c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_EndRxTxTransaction
<LI><a href="#[68]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
</UL>
<BR>[Address Reference Count : 1]<UL><LI> stm32f1xx_hal_spi.o(.text.HAL_SPI_Transmit_DMA)
</UL>
<P><STRONG><a name="[3a]"></a>SPI_DMAError</STRONG> (Thumb, 52 bytes, Stack size 16 bytes, stm32f1xx_hal_spi.o(.text.SPI_DMAError))
<BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = SPI_DMAError &rArr; HAL_SPI_ErrorCallback
</UL>
<BR>[Calls]<UL><LI><a href="#[bf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_ErrorCallback
</UL>
<BR>[Address Reference Count : 3]<UL><LI> stm32f1xx_hal_spi.o(.text.HAL_SPI_Transmit_DMA)
<LI> stm32f1xx_hal_spi.o(.text.HAL_SPI_Receive_DMA)
<LI> stm32f1xx_hal_spi.o(.text.HAL_SPI_TransmitReceive_DMA)
</UL>
<P><STRONG><a name="[38]"></a>SPI_DMAHalfReceiveCplt</STRONG> (Thumb, 22 bytes, Stack size 16 bytes, stm32f1xx_hal_spi.o(.text.SPI_DMAHalfReceiveCplt))
<BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = SPI_DMAHalfReceiveCplt &rArr; HAL_SPI_RxHalfCpltCallback
</UL>
<BR>[Calls]<UL><LI><a href="#[c0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_RxHalfCpltCallback
</UL>
<BR>[Address Reference Count : 2]<UL><LI> stm32f1xx_hal_spi.o(.text.HAL_SPI_Receive_DMA)
<LI> stm32f1xx_hal_spi.o(.text.HAL_SPI_TransmitReceive_DMA)
</UL>
<P><STRONG><a name="[39]"></a>SPI_DMAReceiveCplt</STRONG> (Thumb, 160 bytes, Stack size 24 bytes, stm32f1xx_hal_spi.o(.text.SPI_DMAReceiveCplt))
<BR><BR>[Stack]<UL><LI>Max Depth = 104<LI>Call Chain = SPI_DMAReceiveCplt &rArr; SPI_EndRxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[c4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_RxCpltCallback
<LI><a href="#[bf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_ErrorCallback
<LI><a href="#[c3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_EndRxTransaction
<LI><a href="#[68]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
</UL>
<BR>[Address Reference Count : 2]<UL><LI> stm32f1xx_hal_spi.o(.text.HAL_SPI_Receive_DMA)
<LI> stm32f1xx_hal_spi.o(.text.HAL_SPI_TransmitReceive_DMA)
</UL>
<P><STRONG><a name="[3b]"></a>SPI_DMAHalfTransmitReceiveCplt</STRONG> (Thumb, 22 bytes, Stack size 16 bytes, stm32f1xx_hal_spi.o(.text.SPI_DMAHalfTransmitReceiveCplt))
<BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = SPI_DMAHalfTransmitReceiveCplt &rArr; HAL_SPI_TxRxHalfCpltCallback
</UL>
<BR>[Calls]<UL><LI><a href="#[c2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_TxRxHalfCpltCallback
</UL>
<BR>[Address Reference Count : 1]<UL><LI> stm32f1xx_hal_spi.o(.text.HAL_SPI_TransmitReceive_DMA)
</UL>
<P><STRONG><a name="[3c]"></a>SPI_DMATransmitReceiveCplt</STRONG> (Thumb, 132 bytes, Stack size 24 bytes, stm32f1xx_hal_spi.o(.text.SPI_DMATransmitReceiveCplt))
<BR><BR>[Stack]<UL><LI>Max Depth = 104<LI>Call Chain = SPI_DMATransmitReceiveCplt &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[c6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_TxRxCpltCallback
<LI><a href="#[bf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_ErrorCallback
<LI><a href="#[8c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_EndRxTxTransaction
<LI><a href="#[68]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
</UL>
<BR>[Address Reference Count : 1]<UL><LI> stm32f1xx_hal_spi.o(.text.HAL_SPI_TransmitReceive_DMA)
</UL>
<P><STRONG><a name="[9a]"></a>UART_SetConfig</STRONG> (Thumb, 186 bytes, Stack size 24 bytes, stm32f1xx_hal_uart.o(.text.UART_SetConfig))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = UART_SetConfig &rArr; HAL_RCC_GetPCLK2Freq
</UL>
<BR>[Calls]<UL><LI><a href="#[82]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_GetPCLK2Freq
<LI><a href="#[6b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_GetPCLK1Freq
</UL>
<BR>[Called By]<UL><LI><a href="#[98]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_Init
</UL>

<P><STRONG><a name="[40]"></a>UART_DMATransmitCplt</STRONG> (Thumb, 122 bytes, Stack size 24 bytes, stm32f1xx_hal_uart.o(.text.UART_DMATransmitCplt))
<BR><BR>[Stack]<UL><LI>Max Depth = 28<LI>Call Chain = UART_DMATransmitCplt &rArr; HAL_UART_TxCpltCallback
</UL>
<BR>[Calls]<UL><LI><a href="#[ce]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_TxCpltCallback
</UL>
<BR>[Address Reference Count : 1]<UL><LI> stm32f1xx_hal_uart.o(.text.HAL_UART_Transmit_DMA)
</UL>
<P><STRONG><a name="[41]"></a>UART_DMATxHalfCplt</STRONG> (Thumb, 22 bytes, Stack size 16 bytes, stm32f1xx_hal_uart.o(.text.UART_DMATxHalfCplt))
<BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = UART_DMATxHalfCplt &rArr; HAL_UART_TxHalfCpltCallback
</UL>
<BR>[Calls]<UL><LI><a href="#[cf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_TxHalfCpltCallback
</UL>
<BR>[Address Reference Count : 1]<UL><LI> stm32f1xx_hal_uart.o(.text.HAL_UART_Transmit_DMA)
</UL>
<P><STRONG><a name="[42]"></a>UART_DMAError</STRONG> (Thumb, 124 bytes, Stack size 24 bytes, stm32f1xx_hal_uart.o(.text.UART_DMAError))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = UART_DMAError &rArr; UART_EndRxTransfer
</UL>
<BR>[Calls]<UL><LI><a href="#[93]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_ErrorCallback
<LI><a href="#[91]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_EndRxTransfer
<LI><a href="#[cb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_EndTxTransfer
</UL>
<BR>[Address Reference Count : 2]<UL><LI> stm32f1xx_hal_uart.o(.text.HAL_UART_Transmit_DMA)
<LI> stm32f1xx_hal_uart.o(.text.UART_Start_Receive_DMA)
</UL>
<P><STRONG><a name="[cb]"></a>UART_EndTxTransfer</STRONG> (Thumb, 54 bytes, Stack size 8 bytes, stm32f1xx_hal_uart.o(.text.UART_EndTxTransfer))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = UART_EndTxTransfer
</UL>
<BR>[Called By]<UL><LI><a href="#[42]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_DMAError
</UL>

<P><STRONG><a name="[91]"></a>UART_EndRxTransfer</STRONG> (Thumb, 148 bytes, Stack size 16 bytes, stm32f1xx_hal_uart.o(.text.UART_EndRxTransfer))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = UART_EndRxTransfer
</UL>
<BR>[Called By]<UL><LI><a href="#[42]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_DMAError
<LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_IRQHandler
</UL>

<P><STRONG><a name="[43]"></a>UART_DMAReceiveCplt</STRONG> (Thumb, 244 bytes, Stack size 32 bytes, stm32f1xx_hal_uart.o(.text.UART_DMAReceiveCplt))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = UART_DMAReceiveCplt &rArr; HAL_UARTEx_RxEventCallback
</UL>
<BR>[Calls]<UL><LI><a href="#[cc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_RxCpltCallback
<LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UARTEx_RxEventCallback
</UL>
<BR>[Address Reference Count : 1]<UL><LI> stm32f1xx_hal_uart.o(.text.UART_Start_Receive_DMA)
</UL>
<P><STRONG><a name="[44]"></a>UART_DMARxHalfCplt</STRONG> (Thumb, 52 bytes, Stack size 16 bytes, stm32f1xx_hal_uart.o(.text.UART_DMARxHalfCplt))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = UART_DMARxHalfCplt &rArr; HAL_UARTEx_RxEventCallback
</UL>
<BR>[Calls]<UL><LI><a href="#[cd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_RxHalfCpltCallback
<LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UARTEx_RxEventCallback
</UL>
<BR>[Address Reference Count : 1]<UL><LI> stm32f1xx_hal_uart.o(.text.UART_Start_Receive_DMA)
</UL>
<P><STRONG><a name="[90]"></a>UART_Receive_IT</STRONG> (Thumb, 362 bytes, Stack size 32 bytes, stm32f1xx_hal_uart.o(.text.UART_Receive_IT))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = UART_Receive_IT &rArr; HAL_UARTEx_RxEventCallback
</UL>
<BR>[Calls]<UL><LI><a href="#[cc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_RxCpltCallback
<LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UARTEx_RxEventCallback
</UL>
<BR>[Called By]<UL><LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_IRQHandler
</UL>

<P><STRONG><a name="[3f]"></a>UART_DMAAbortOnError</STRONG> (Thumb, 32 bytes, Stack size 16 bytes, stm32f1xx_hal_uart.o(.text.UART_DMAAbortOnError))
<BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = UART_DMAAbortOnError &rArr; HAL_UART_ErrorCallback
</UL>
<BR>[Calls]<UL><LI><a href="#[93]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_ErrorCallback
</UL>
<BR>[Address Reference Count : 1]<UL><LI> stm32f1xx_hal_uart.o(.text.HAL_UART_IRQHandler)
</UL>
<P><STRONG><a name="[96]"></a>UART_Transmit_IT</STRONG> (Thumb, 148 bytes, Stack size 12 bytes, stm32f1xx_hal_uart.o(.text.UART_Transmit_IT))
<BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = UART_Transmit_IT
</UL>
<BR>[Called By]<UL><LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_IRQHandler
</UL>

<P><STRONG><a name="[97]"></a>UART_EndTransmit_IT</STRONG> (Thumb, 38 bytes, Stack size 16 bytes, stm32f1xx_hal_uart.o(.text.UART_EndTransmit_IT))
<BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = UART_EndTransmit_IT &rArr; HAL_UART_TxCpltCallback
</UL>
<BR>[Calls]<UL><LI><a href="#[ce]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_TxCpltCallback
</UL>
<BR>[Called By]<UL><LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_IRQHandler
</UL>

<P><STRONG><a name="[e0]"></a>__NVIC_SystemReset</STRONG> (Thumb, 38 bytes, Stack size 0 bytes, http.o(.text.__NVIC_SystemReset))
<BR><BR>[Called By]<UL><LI><a href="#[a8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;func_analysis_http_request
</UL>

<P><STRONG><a name="[ff]"></a>_fp_digits</STRONG> (Thumb, 366 bytes, Stack size 64 bytes, printfa.o(i._fp_digits), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[4c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_uldivmod
<LI><a href="#[55]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dmul
<LI><a href="#[56]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_ddiv
<LI><a href="#[4f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dadd
<LI><a href="#[57]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_d2ulz
<LI><a href="#[100]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_cdrcmple
</UL>
<BR>[Called By]<UL><LI><a href="#[fd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_core
</UL>

<P><STRONG><a name="[fd]"></a>_printf_core</STRONG> (Thumb, 1744 bytes, Stack size 136 bytes, printfa.o(i._printf_core), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[4c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_uldivmod
<LI><a href="#[103]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_uidivmod
<LI><a href="#[101]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_pre_padding
<LI><a href="#[102]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_post_padding
<LI><a href="#[ff]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fp_digits
</UL>
<BR>[Called By]<UL><LI><a href="#[fe]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__0sprintf
<LI><a href="#[fc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__0printf
</UL>

<P><STRONG><a name="[102]"></a>_printf_post_padding</STRONG> (Thumb, 36 bytes, Stack size 24 bytes, printfa.o(i._printf_post_padding), UNUSED)
<BR><BR>[Called By]<UL><LI><a href="#[fd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_core
</UL>

<P><STRONG><a name="[101]"></a>_printf_pre_padding</STRONG> (Thumb, 46 bytes, Stack size 24 bytes, printfa.o(i._printf_pre_padding), UNUSED)
<BR><BR>[Called By]<UL><LI><a href="#[fd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_core
</UL>

<P><STRONG><a name="[46]"></a>_sputc</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, printfa.o(i._sputc))
<BR><BR>[Called By]<UL><LI><a href="#[fe]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__0sprintf
</UL>
<BR>[Address Reference Count : 1]<UL><LI> printfa.o(i.__0sprintf)
</UL><P>
<H3>
Undefined Global Symbols
</H3><HR></body></html>
